* [PATCH 1/2] drm/i915/debugfs: Print sink PSR status
@ 2018-03-30 21:15 José Roberto de Souza
2018-03-30 21:15 ` [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP José Roberto de Souza
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: José Roberto de Souza @ 2018-03-30 21:15 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
IGT tests could be improved with sink status, knowing for sure that
hardware have activate or exit PSR.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 1dba2c451255..c9ac946b62c9 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2603,6 +2603,26 @@ static const char *psr2_live_status(u32 val)
return "unknown";
}
+static const char *psr_sink_status(u8 val)
+{
+ static const char * const sink_status[] = {
+ "inactive",
+ "transition to active, capture and display",
+ "active, display from RFB",
+ "active, capture and display on sink device timings",
+ "transition to inactive, capture and display, timing re-sync",
+ "reserved",
+ "reserved",
+ "sink internal error"
+ };
+
+ val &= DP_PSR_SINK_STATE_MASK;
+ if (val < ARRAY_SIZE(sink_status))
+ return sink_status[val];
+
+ return "unknown";
+}
+
static int i915_edp_psr_status(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -2684,6 +2704,15 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
seq_printf(m, "EDP_PSR2_STATUS: %x [%s]\n",
psr2, psr2_live_status(psr2));
}
+
+ if (dev_priv->psr.enabled) {
+ struct drm_dp_aux *aux = &dev_priv->psr.enabled->aux;
+ u8 val;
+
+ if (drm_dp_dpcd_readb(aux, DP_PSR_STATUS, &val) == 1)
+ seq_printf(m, "Sink PSR status: 0x%x [%s]\n", val,
+ psr_sink_status(val));
+ }
mutex_unlock(&dev_priv->psr.lock);
intel_runtime_pm_put(dev_priv);
--
2.16.3
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^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP
2018-03-30 21:15 [PATCH 1/2] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
@ 2018-03-30 21:15 ` José Roberto de Souza
2018-03-30 23:46 ` Pandiyan, Dhinakaran
2018-03-30 21:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/debugfs: Print sink PSR status Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: José Roberto de Souza @ 2018-03-30 21:15 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan
This was my bad, spec says that the name of this bit is
'Y-coordinate valid' but the values for it is:
0: Include Y-coordinate valid eDP1.4a
1: Do not include Y-coordinate valid eDP 1.4
So renaming the bit and not setting it.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_psr.c | 5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 176dca6554f4..19429cb1f3a7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4058,7 +4058,7 @@ enum {
#define EDP_PSR2_CTL _MMIO(0x6f900)
#define EDP_PSR2_ENABLE (1<<31)
#define EDP_SU_TRACK_ENABLE (1<<30)
-#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */
+#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+ */
#define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+ */
#define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20)
#define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2d53f7398a6d..f12111438bcf 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
* mesh at all with our frontbuffer tracking. And the hw alone isn't
* good enough. */
val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
- if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
- val |= EDP_Y_COORDINATE_VALID | EDP_Y_COORDINATE_ENABLE;
- }
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ val |= EDP_Y_COORDINATE_ENABLE;
val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
--
2.16.3
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^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP
2018-03-30 21:15 ` [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP José Roberto de Souza
@ 2018-03-30 23:46 ` Pandiyan, Dhinakaran
2018-03-31 0:17 ` Souza, Jose
0 siblings, 1 reply; 9+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-03-30 23:46 UTC (permalink / raw)
To: Vivi, Rodrigo, Souza, Jose; +Cc: intel-gfx@lists.freedesktop.org
On Fri, 2018-03-30 at 14:15 -0700, José Roberto de Souza wrote:
> This was my bad, spec says that the name of this bit is
> 'Y-coordinate valid' but the values for it is:
> 0: Include Y-coordinate valid eDP1.4a
> 1: Do not include Y-coordinate valid eDP 1.4
> So renaming the bit and not setting it.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> drivers/gpu/drm/i915/intel_psr.c | 5 ++---
> 2 files changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 176dca6554f4..19429cb1f3a7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4058,7 +4058,7 @@ enum {
> #define EDP_PSR2_CTL _MMIO(0x6f900)
> #define EDP_PSR2_ENABLE (1<<31)
> #define EDP_SU_TRACK_ENABLE (1<<30)
> -#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */
> +#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+ */
INVALID isn't the same as asking the source to not send the y-coordinate
valid bit. Sorry to be pedantic, please leave the definition as it is.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> if you
remove this hunk.
> #define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+ */
> #define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20)
> #define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20)
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 2d53f7398a6d..f12111438bcf 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
> * mesh at all with our frontbuffer tracking. And the hw alone isn't
> * good enough. */
> val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
> - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
> - val |= EDP_Y_COORDINATE_VALID | EDP_Y_COORDINATE_ENABLE;
> - }
> + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + val |= EDP_Y_COORDINATE_ENABLE;
>
> val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP
2018-03-30 23:46 ` Pandiyan, Dhinakaran
@ 2018-03-31 0:17 ` Souza, Jose
2018-04-02 17:42 ` Pandiyan, Dhinakaran
0 siblings, 1 reply; 9+ messages in thread
From: Souza, Jose @ 2018-03-31 0:17 UTC (permalink / raw)
To: Vivi, Rodrigo, Pandiyan, Dhinakaran; +Cc: intel-gfx@lists.freedesktop.org
On Fri, 2018-03-30 at 16:46 -0700, Pandiyan, Dhinakaran wrote:
> On Fri, 2018-03-30 at 14:15 -0700, José Roberto de Souza wrote:
> > This was my bad, spec says that the name of this bit is
> > 'Y-coordinate valid' but the values for it is:
> > 0: Include Y-coordinate valid eDP1.4a
> > 1: Do not include Y-coordinate valid eDP 1.4
> > So renaming the bit and not setting it.
> >
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > drivers/gpu/drm/i915/intel_psr.c | 5 ++---
> > 2 files changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 176dca6554f4..19429cb1f3a7 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4058,7 +4058,7 @@ enum {
> > #define EDP_PSR2_CTL _MMIO(0x6f900)
> > #define EDP_PSR2_ENABLE (1<<31)
> > #define EDP_SU_TRACK_ENABLE (1<<30)
> > -#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */
> > +#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+
> > */
>
> INVALID isn't the same as asking the source to not send the y-
> coordinate
> valid bit. Sorry to be pedantic, please leave the definition as it
> is.
I agree with you, if it don't need to send the y-coordinate is
better just not set EDP_Y_COORDINATE_ENABLE but leave the bit
definition name as it is, is prone to others do the same error as I
did.
>
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> if
> you
> remove this hunk.
>
> > #define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+
> > */
> > #define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20)
> > #define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20)
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 2d53f7398a6d..f12111438bcf 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp
> > *intel_dp)
> > * mesh at all with our frontbuffer tracking. And the hw
> > alone isn't
> > * good enough. */
> > val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
> > - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > {
> > - val |= EDP_Y_COORDINATE_VALID |
> > EDP_Y_COORDINATE_ENABLE;
> > - }
> > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > + val |= EDP_Y_COORDINATE_ENABLE;
> >
> > val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv-
> > >psr.sink_sync_latency + 1);
> >
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP
2018-03-31 0:17 ` Souza, Jose
@ 2018-04-02 17:42 ` Pandiyan, Dhinakaran
2018-04-02 18:33 ` Rodrigo Vivi
0 siblings, 1 reply; 9+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-04-02 17:42 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx@lists.freedesktop.org, Vivi, Rodrigo
On Sat, 2018-03-31 at 00:17 +0000, Souza, Jose wrote:
> On Fri, 2018-03-30 at 16:46 -0700, Pandiyan, Dhinakaran wrote:
> > On Fri, 2018-03-30 at 14:15 -0700, José Roberto de Souza wrote:
> > > This was my bad, spec says that the name of this bit is
> > > 'Y-coordinate valid' but the values for it is:
> > > 0: Include Y-coordinate valid eDP1.4a
> > > 1: Do not include Y-coordinate valid eDP 1.4
> > > So renaming the bit and not setting it.
> > >
> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > > drivers/gpu/drm/i915/intel_psr.c | 5 ++---
> > > 2 files changed, 3 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 176dca6554f4..19429cb1f3a7 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -4058,7 +4058,7 @@ enum {
> > > #define EDP_PSR2_CTL _MMIO(0x6f900)
> > > #define EDP_PSR2_ENABLE (1<<31)
> > > #define EDP_SU_TRACK_ENABLE (1<<30)
> > > -#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */
> > > +#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+
> > > */
> >
> > INVALID isn't the same as asking the source to not send the y-
> > coordinate
> > valid bit. Sorry to be pedantic, please leave the definition as it
> > is.
>
> I agree with you, if it don't need to send the y-coordinate is
> better just not set EDP_Y_COORDINATE_ENABLE but leave the bit
> definition name as it is, is prone to others do the same error as I
> did.
>
I'll let Rodrigo take a call on this one.
-DK
> >
> > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> if
> > you
> > remove this hunk.
> >
> > > #define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+
> > > */
> > > #define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20)
> > > #define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20)
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index 2d53f7398a6d..f12111438bcf 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp
> > > *intel_dp)
> > > * mesh at all with our frontbuffer tracking. And the hw
> > > alone isn't
> > > * good enough. */
> > > val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
> > > - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > > {
> > > - val |= EDP_Y_COORDINATE_VALID |
> > > EDP_Y_COORDINATE_ENABLE;
> > > - }
> > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > > + val |= EDP_Y_COORDINATE_ENABLE;
> > >
> > > val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv-
> > > >psr.sink_sync_latency + 1);
> > >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP
2018-04-02 17:42 ` Pandiyan, Dhinakaran
@ 2018-04-02 18:33 ` Rodrigo Vivi
0 siblings, 0 replies; 9+ messages in thread
From: Rodrigo Vivi @ 2018-04-02 18:33 UTC (permalink / raw)
To: Pandiyan, Dhinakaran; +Cc: intel-gfx@lists.freedesktop.org
On Mon, Apr 02, 2018 at 10:42:23AM -0700, Pandiyan, Dhinakaran wrote:
>
>
>
> On Sat, 2018-03-31 at 00:17 +0000, Souza, Jose wrote:
> > On Fri, 2018-03-30 at 16:46 -0700, Pandiyan, Dhinakaran wrote:
> > > On Fri, 2018-03-30 at 14:15 -0700, José Roberto de Souza wrote:
> > > > This was my bad, spec says that the name of this bit is
> > > > 'Y-coordinate valid' but the values for it is:
> > > > 0: Include Y-coordinate valid eDP1.4a
> > > > 1: Do not include Y-coordinate valid eDP 1.4
> > > > So renaming the bit and not setting it.
> > > >
> > > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > > > drivers/gpu/drm/i915/intel_psr.c | 5 ++---
> > > > 2 files changed, 3 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > b/drivers/gpu/drm/i915/i915_reg.h
> > > > index 176dca6554f4..19429cb1f3a7 100644
> > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > @@ -4058,7 +4058,7 @@ enum {
> > > > #define EDP_PSR2_CTL _MMIO(0x6f900)
> > > > #define EDP_PSR2_ENABLE (1<<31)
> > > > #define EDP_SU_TRACK_ENABLE (1<<30)
> > > > -#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */
> > > > +#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+
> > > > */
> > >
> > > INVALID isn't the same as asking the source to not send the y-
> > > coordinate
> > > valid bit. Sorry to be pedantic, please leave the definition as it
> > > is.
> >
> > I agree with you, if it don't need to send the y-coordinate is
> > better just not set EDP_Y_COORDINATE_ENABLE but leave the bit
> > definition name as it is, is prone to others do the same error as I
> > did.
> >
>
> I'll let Rodrigo take a call on this one.
I agree with DK.
Please use the spec name, i.e. "BitField: Y-coordinate valid"
"invalid" will actually bring even more confusion.
>
> -DK
>
> > >
> > > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> if
> > > you
> > > remove this hunk.
> > >
> > > > #define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+
> > > > */
> > > > #define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20)
> > > > #define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20)
> > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > > b/drivers/gpu/drm/i915/intel_psr.c
> > > > index 2d53f7398a6d..f12111438bcf 100644
> > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > @@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp
> > > > *intel_dp)
> > > > * mesh at all with our frontbuffer tracking. And the hw
> > > > alone isn't
> > > > * good enough. */
> > > > val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
> > > > - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > > > {
> > > > - val |= EDP_Y_COORDINATE_VALID |
> > > > EDP_Y_COORDINATE_ENABLE;
> > > > - }
> > > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> > > > + val |= EDP_Y_COORDINATE_ENABLE;
> > > >
> > > > val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv-
> > > > >psr.sink_sync_latency + 1);
> > > >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/debugfs: Print sink PSR status
2018-03-30 21:15 [PATCH 1/2] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
2018-03-30 21:15 ` [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP José Roberto de Souza
@ 2018-03-30 21:29 ` Patchwork
2018-03-30 21:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-30 22:43 ` ✗ Fi.CI.IGT: failure " Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-03-30 21:29 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/debugfs: Print sink PSR status
URL : https://patchwork.freedesktop.org/series/40977/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9444b2175c0a drm/i915/debugfs: Print sink PSR status
6d65247b0089 drm/i915/psr/cnl: Set y-coordinate as valid in SDP
-:27: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#27: FILE: drivers/gpu/drm/i915/i915_reg.h:4061:
+#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+ */
^
total: 0 errors, 0 warnings, 1 checks, 19 lines checked
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^ permalink raw reply [flat|nested] 9+ messages in thread* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/debugfs: Print sink PSR status
2018-03-30 21:15 [PATCH 1/2] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
2018-03-30 21:15 ` [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP José Roberto de Souza
2018-03-30 21:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/debugfs: Print sink PSR status Patchwork
@ 2018-03-30 21:44 ` Patchwork
2018-03-30 22:43 ` ✗ Fi.CI.IGT: failure " Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-03-30 21:44 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/debugfs: Print sink PSR status
URL : https://patchwork.freedesktop.org/series/40977/
State : success
== Summary ==
Series 40977v1 series starting with [1/2] drm/i915/debugfs: Print sink PSR status
https://patchwork.freedesktop.org/api/1.0/series/40977/revisions/1/mbox/
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:431s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:440s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:379s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:541s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:297s
fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:511s
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:511s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:517s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:508s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:411s
fi-cfl-s3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:558s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:515s
fi-cnl-y3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:582s
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:424s
fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:319s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:542s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:404s
fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:420s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:471s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:432s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:471s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:465s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:509s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:665s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:436s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:541s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:506s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:490s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:430s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:444s
fi-snb-2520m total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:583s
fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:400s
Blacklisted hosts:
fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:530s
fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:483s
c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest
6d65247b0089 drm/i915/psr/cnl: Set y-coordinate as valid in SDP
9444b2175c0a drm/i915/debugfs: Print sink PSR status
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8553/issues.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/debugfs: Print sink PSR status
2018-03-30 21:15 [PATCH 1/2] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
` (2 preceding siblings ...)
2018-03-30 21:44 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-03-30 22:43 ` Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-03-30 22:43 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/debugfs: Print sink PSR status
URL : https://patchwork.freedesktop.org/series/40977/
State : failure
== Summary ==
---- Possible new issues:
Test kms_cursor_crc:
Subgroup cursor-64x64-suspend:
dmesg-warn -> PASS (shard-snb)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-shrfb-plflip-blt:
pass -> DMESG-FAIL (shard-apl)
Subgroup fbc-rgb565-draw-mmap-gtt:
pass -> FAIL (shard-apl)
---- Known issues:
Test gem_softpin:
Subgroup noreloc-s3:
incomplete -> PASS (shard-hsw) fdo#103540
Test kms_flip:
Subgroup flip-vs-expired-vblank:
pass -> FAIL (shard-hsw) fdo#102887
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-shrfb-msflip-blt:
dmesg-fail -> PASS (shard-apl) fdo#104727
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727
shard-apl total:3495 pass:1829 dwarn:1 dfail:1 fail:8 skip:1655 time:12846s
shard-hsw total:3495 pass:1782 dwarn:1 dfail:0 fail:2 skip:1709 time:11486s
shard-snb total:3495 pass:1374 dwarn:1 dfail:0 fail:3 skip:2117 time:7021s
Blacklisted hosts:
shard-kbl total:3495 pass:1959 dwarn:1 dfail:0 fail:7 skip:1528 time:9234s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8553/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-04-02 18:33 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-30 21:15 [PATCH 1/2] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
2018-03-30 21:15 ` [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP José Roberto de Souza
2018-03-30 23:46 ` Pandiyan, Dhinakaran
2018-03-31 0:17 ` Souza, Jose
2018-04-02 17:42 ` Pandiyan, Dhinakaran
2018-04-02 18:33 ` Rodrigo Vivi
2018-03-30 21:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/debugfs: Print sink PSR status Patchwork
2018-03-30 21:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-30 22:43 ` ✗ Fi.CI.IGT: failure " Patchwork
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