* [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" @ 2018-04-27 18:52 ` Colin King 0 siblings, 0 replies; 10+ messages in thread From: Colin King @ 2018-04-27 18:52 UTC (permalink / raw) To: Ingo Molnar, Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel Cc: kernel-janitors From: Colin Ian King <colin.king@canonical.com> Trivial fix to spelling mistakes in json text strings Signed-off-by: Colin Ian King <colin.king@canonical.com> --- tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json index a11029efda2f..c20ff6b3cb9d 100644 --- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json +++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json @@ -333,7 +333,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3226,4 +3226,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json index 21a0f8fd057e..79f7120c50a5 100644 --- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json +++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json @@ -333,7 +333,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3181,4 +3181,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json index 6e61ae20d01a..08fa9ebf056a 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -2814,4 +2814,4 @@ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json index dad20f0e3cac..be612cda6b68 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3230,4 +3230,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json index f9bc7fdd48d6..c5896ed6542c 100644 --- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3222,4 +3222,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] -- 2.17.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" @ 2018-04-27 18:52 ` Colin King 0 siblings, 0 replies; 10+ messages in thread From: Colin King @ 2018-04-27 18:52 UTC (permalink / raw) To: Ingo Molnar, Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel Cc: kernel-janitors From: Colin Ian King <colin.king@canonical.com> Trivial fix to spelling mistakes in json text strings Signed-off-by: Colin Ian King <colin.king@canonical.com> --- tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++-- tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json index a11029efda2f..c20ff6b3cb9d 100644 --- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json +++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json @@ -333,7 +333,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3226,4 +3226,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json index 21a0f8fd057e..79f7120c50a5 100644 --- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json +++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json @@ -333,7 +333,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3181,4 +3181,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json index 6e61ae20d01a..08fa9ebf056a 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -2814,4 +2814,4 @@ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json index dad20f0e3cac..be612cda6b68 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3230,4 +3230,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json index f9bc7fdd48d6..c5896ed6542c 100644 --- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json +++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json @@ -213,7 +213,7 @@ "UMask": "0x7", "EventName": "L2_LINES_IN.ANY", "SampleAfterValue": "100000", - "BriefDescription": "L2 lines alloacated" + "BriefDescription": "L2 lines allocated" }, { "EventCode": "0xF1", @@ -3222,4 +3222,4 @@ "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", "Offcore": "1" } -] \ No newline at end of file +] -- 2.17.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" 2018-04-27 18:52 ` Colin King @ 2018-04-30 13:52 ` Arnaldo Carvalho de Melo -1 siblings, 0 replies; 10+ messages in thread From: Arnaldo Carvalho de Melo @ 2018-04-30 13:52 UTC (permalink / raw) To: Colin King Cc: Ingo Molnar, Andi Kleen, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel, kernel-janitors Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu: > From: Colin Ian King <colin.king@canonical.com> > > Trivial fix to spelling mistakes in json text strings These files are generated from other files, so any future update to them will bring back the spelling mistakes, so, as Andi pointed out previously, we better fix the spellings in the original files, maintained by Intel. - Arnaldo > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++-- > 5 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > index a11029efda2f..c20ff6b3cb9d 100644 > --- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > +++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > @@ -333,7 +333,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3226,4 +3226,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > index 21a0f8fd057e..79f7120c50a5 100644 > --- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > +++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > @@ -333,7 +333,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3181,4 +3181,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > index 6e61ae20d01a..08fa9ebf056a 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -2814,4 +2814,4 @@ > "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > index dad20f0e3cac..be612cda6b68 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3230,4 +3230,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json > index f9bc7fdd48d6..c5896ed6542c 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3222,4 +3222,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > -- > 2.17.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" @ 2018-04-30 13:52 ` Arnaldo Carvalho de Melo 0 siblings, 0 replies; 10+ messages in thread From: Arnaldo Carvalho de Melo @ 2018-04-30 13:52 UTC (permalink / raw) To: Colin King Cc: Ingo Molnar, Andi Kleen, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel, kernel-janitors Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu: > From: Colin Ian King <colin.king@canonical.com> > > Trivial fix to spelling mistakes in json text strings These files are generated from other files, so any future update to them will bring back the spelling mistakes, so, as Andi pointed out previously, we better fix the spellings in the original files, maintained by Intel. - Arnaldo > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++-- > tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++-- > 5 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > index a11029efda2f..c20ff6b3cb9d 100644 > --- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > +++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json > @@ -333,7 +333,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3226,4 +3226,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > index 21a0f8fd057e..79f7120c50a5 100644 > --- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > +++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json > @@ -333,7 +333,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3181,4 +3181,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > index 6e61ae20d01a..08fa9ebf056a 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -2814,4 +2814,4 @@ > "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > index dad20f0e3cac..be612cda6b68 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3230,4 +3230,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json > index f9bc7fdd48d6..c5896ed6542c 100644 > --- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json > +++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json > @@ -213,7 +213,7 @@ > "UMask": "0x7", > "EventName": "L2_LINES_IN.ANY", > "SampleAfterValue": "100000", > - "BriefDescription": "L2 lines alloacated" > + "BriefDescription": "L2 lines allocated" > }, > { > "EventCode": "0xF1", > @@ -3222,4 +3222,4 @@ > "BriefDescription": "Offcore prefetch requests that HITM in a remote cache", > "Offcore": "1" > } > -] > \ No newline at end of file > +] > -- > 2.17.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" 2018-04-30 13:52 ` Arnaldo Carvalho de Melo @ 2018-04-30 15:29 ` Andi Kleen -1 siblings, 0 replies; 10+ messages in thread From: Andi Kleen @ 2018-04-30 15:29 UTC (permalink / raw) To: Arnaldo Carvalho de Melo Cc: Colin King, Ingo Molnar, Andi Kleen, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel, kernel-janitors On Mon, Apr 30, 2018 at 10:52:56AM -0300, Arnaldo Carvalho de Melo wrote: > Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu: > > From: Colin Ian King <colin.king@canonical.com> > > > > Trivial fix to spelling mistakes in json text strings > > These files are generated from other files, so any future update to them > will bring back the spelling mistakes, so, as Andi pointed out > previously, we better fix the spellings in the original files, > maintained by Intel. Thanks. I forwarded to the right people. -Andi ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" @ 2018-04-30 15:29 ` Andi Kleen 0 siblings, 0 replies; 10+ messages in thread From: Andi Kleen @ 2018-04-30 15:29 UTC (permalink / raw) To: Arnaldo Carvalho de Melo Cc: Colin King, Ingo Molnar, Andi Kleen, Alexander Shishkin, Jiri Olsa, Namhyung Kim, linux-kernel, kernel-janitors On Mon, Apr 30, 2018 at 10:52:56AM -0300, Arnaldo Carvalho de Melo wrote: > Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu: > > From: Colin Ian King <colin.king@canonical.com> > > > > Trivial fix to spelling mistakes in json text strings > > These files are generated from other files, so any future update to them > will bring back the spelling mistakes, so, as Andi pointed out > previously, we better fix the spellings in the original files, > maintained by Intel. Thanks. I forwarded to the right people. -Andi ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] perf vendor events: fix spelling mistakes: "occurences" -> "occurrences" @ 2020-03-16 9:38 ` Colin King 0 siblings, 0 replies; 10+ messages in thread From: Colin King @ 2020-03-16 9:38 UTC (permalink / raw) To: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin, Jiri Olsa, Namhyung Kim, Andi Kleen Cc: kernel-janitors, linux-kernel From: Colin Ian King <colin.king@canonical.com> Fix spelling mistake of "occurrences" Signed-off-by: Colin Ian King <colin.king@canonical.com> --- tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 2 +- tools/perf/pmu-events/arch/x86/ivytown/pipeline.json | 2 +- tools/perf/pmu-events/arch/x86/jaketown/pipeline.json | 2 +- .../perf/pmu-events/arch/x86/knightslanding/pipeline.json | 8 ++++---- tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json index 2a0aad91d83d..e5ca2d85e84d 100644 --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json @@ -80,7 +80,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json index 2a0aad91d83d..e5ca2d85e84d 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json @@ -80,7 +80,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json index 783a5b4a67b1..f32fd4aea6b1 100644 --- a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json @@ -1019,7 +1019,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json index 92e4ef2e22c6..17c92cdedde0 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json @@ -340,7 +340,7 @@ "UMask": "0x1", "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address partially overlaps with a store", + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with a store", "Data_LA": "1" }, { @@ -349,7 +349,7 @@ "UMask": "0x2", "EventName": "RECYCLEQ.LD_BLOCK_STD_NOTREADY", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address overlaps with a store whose data is not ready" + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address overlaps with a store whose data is not ready" }, { "PublicDescription": "This event counts the number of retired store that experienced a cache line boundary split(Precise Event). Note that each spilt should be counted only once.", @@ -358,7 +358,7 @@ "UMask": "0x4", "EventName": "RECYCLEQ.ST_SPLITS", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired store that is a cache line split. Each split should be counted only once." + "BriefDescription": "Counts the number of occurrences a retired store that is a cache line split. Each split should be counted only once." }, { "PEBS": "1", @@ -367,7 +367,7 @@ "UMask": "0x8", "EventName": "RECYCLEQ.LD_SPLITS", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load that is a cache line split. Each split should be counted only once.", + "BriefDescription": "Counts the number of occurrences a retired load that is a cache line split. Each split should be counted only once.", "Data_LA": "1" }, { diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json index b7150f65f16d..d69db55f33e7 100644 --- a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json @@ -108,7 +108,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, -- 2.25.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] perf vendor events: fix spelling mistakes: "occurences" -> "occurrences" @ 2020-03-16 9:38 ` Colin King 0 siblings, 0 replies; 10+ messages in thread From: Colin King @ 2020-03-16 9:38 UTC (permalink / raw) To: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin, Jiri Olsa, Namhyung Kim, Andi Kleen Cc: kernel-janitors, linux-kernel From: Colin Ian King <colin.king@canonical.com> Fix spelling mistake of "occurrences" Signed-off-by: Colin Ian King <colin.king@canonical.com> --- tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 2 +- tools/perf/pmu-events/arch/x86/ivytown/pipeline.json | 2 +- tools/perf/pmu-events/arch/x86/jaketown/pipeline.json | 2 +- .../perf/pmu-events/arch/x86/knightslanding/pipeline.json | 8 ++++---- tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json index 2a0aad91d83d..e5ca2d85e84d 100644 --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json @@ -80,7 +80,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json index 2a0aad91d83d..e5ca2d85e84d 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json @@ -80,7 +80,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json index 783a5b4a67b1..f32fd4aea6b1 100644 --- a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json @@ -1019,7 +1019,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json index 92e4ef2e22c6..17c92cdedde0 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json @@ -340,7 +340,7 @@ "UMask": "0x1", "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address partially overlaps with a store", + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with a store", "Data_LA": "1" }, { @@ -349,7 +349,7 @@ "UMask": "0x2", "EventName": "RECYCLEQ.LD_BLOCK_STD_NOTREADY", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address overlaps with a store whose data is not ready" + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address overlaps with a store whose data is not ready" }, { "PublicDescription": "This event counts the number of retired store that experienced a cache line boundary split(Precise Event). Note that each spilt should be counted only once.", @@ -358,7 +358,7 @@ "UMask": "0x4", "EventName": "RECYCLEQ.ST_SPLITS", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired store that is a cache line split. Each split should be counted only once." + "BriefDescription": "Counts the number of occurrences a retired store that is a cache line split. Each split should be counted only once." }, { "PEBS": "1", @@ -367,7 +367,7 @@ "UMask": "0x8", "EventName": "RECYCLEQ.LD_SPLITS", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired load that is a cache line split. Each split should be counted only once.", + "BriefDescription": "Counts the number of occurrences a retired load that is a cache line split. Each split should be counted only once.", "Data_LA": "1" }, { diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json index b7150f65f16d..d69db55f33e7 100644 --- a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json @@ -108,7 +108,7 @@ "EdgeDetect": "1", "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", "SampleAfterValue": "2000003", - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, -- 2.25.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistakes: "occurences" -> "occurrences" 2020-03-16 9:38 ` Colin King @ 2020-03-16 13:58 ` Arnaldo Carvalho de Melo -1 siblings, 0 replies; 10+ messages in thread From: Arnaldo Carvalho de Melo @ 2020-03-16 13:58 UTC (permalink / raw) To: Colin King, Andi Kleen Cc: Peter Zijlstra, Ingo Molnar, Mark Rutland, Alexander Shishkin, Jiri Olsa, Namhyung Kim, Andi Kleen, kernel-janitors, linux-kernel Em Mon, Mar 16, 2020 at 09:38:53AM +0000, Colin King escreveu: > From: Colin Ian King <colin.king@canonical.com> > > Fix spelling mistake of "occurrences" This has to be done on the master doc at Intel from where these json files are generated, otherwise in the next update this will get overwritten. - Arnaldo > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 2 +- > tools/perf/pmu-events/arch/x86/ivytown/pipeline.json | 2 +- > tools/perf/pmu-events/arch/x86/jaketown/pipeline.json | 2 +- > .../perf/pmu-events/arch/x86/knightslanding/pipeline.json | 8 ++++---- > tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json | 2 +- > 5 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > index 2a0aad91d83d..e5ca2d85e84d 100644 > --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > @@ -80,7 +80,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > index 2a0aad91d83d..e5ca2d85e84d 100644 > --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > @@ -80,7 +80,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > index 783a5b4a67b1..f32fd4aea6b1 100644 > --- a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > @@ -1019,7 +1019,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > index 92e4ef2e22c6..17c92cdedde0 100644 > --- a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > @@ -340,7 +340,7 @@ > "UMask": "0x1", > "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address partially overlaps with a store", > + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with a store", > "Data_LA": "1" > }, > { > @@ -349,7 +349,7 @@ > "UMask": "0x2", > "EventName": "RECYCLEQ.LD_BLOCK_STD_NOTREADY", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address overlaps with a store whose data is not ready" > + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address overlaps with a store whose data is not ready" > }, > { > "PublicDescription": "This event counts the number of retired store that experienced a cache line boundary split(Precise Event). Note that each spilt should be counted only once.", > @@ -358,7 +358,7 @@ > "UMask": "0x4", > "EventName": "RECYCLEQ.ST_SPLITS", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired store that is a cache line split. Each split should be counted only once." > + "BriefDescription": "Counts the number of occurrences a retired store that is a cache line split. Each split should be counted only once." > }, > { > "PEBS": "1", > @@ -367,7 +367,7 @@ > "UMask": "0x8", > "EventName": "RECYCLEQ.LD_SPLITS", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load that is a cache line split. Each split should be counted only once.", > + "BriefDescription": "Counts the number of occurrences a retired load that is a cache line split. Each split should be counted only once.", > "Data_LA": "1" > }, > { > diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > index b7150f65f16d..d69db55f33e7 100644 > --- a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > @@ -108,7 +108,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > -- > 2.25.1 > -- - Arnaldo ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] perf vendor events: fix spelling mistakes: "occurences" -> "occurrences" @ 2020-03-16 13:58 ` Arnaldo Carvalho de Melo 0 siblings, 0 replies; 10+ messages in thread From: Arnaldo Carvalho de Melo @ 2020-03-16 13:58 UTC (permalink / raw) To: Colin King, Andi Kleen Cc: Peter Zijlstra, Ingo Molnar, Mark Rutland, Alexander Shishkin, Jiri Olsa, Namhyung Kim, Andi Kleen, kernel-janitors, linux-kernel Em Mon, Mar 16, 2020 at 09:38:53AM +0000, Colin King escreveu: > From: Colin Ian King <colin.king@canonical.com> > > Fix spelling mistake of "occurrences" This has to be done on the master doc at Intel from where these json files are generated, otherwise in the next update this will get overwritten. - Arnaldo > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 2 +- > tools/perf/pmu-events/arch/x86/ivytown/pipeline.json | 2 +- > tools/perf/pmu-events/arch/x86/jaketown/pipeline.json | 2 +- > .../perf/pmu-events/arch/x86/knightslanding/pipeline.json | 8 ++++---- > tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json | 2 +- > 5 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > index 2a0aad91d83d..e5ca2d85e84d 100644 > --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json > @@ -80,7 +80,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > index 2a0aad91d83d..e5ca2d85e84d 100644 > --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json > @@ -80,7 +80,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.)", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > index 783a5b4a67b1..f32fd4aea6b1 100644 > --- a/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/jaketown/pipeline.json > @@ -1019,7 +1019,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > index 92e4ef2e22c6..17c92cdedde0 100644 > --- a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json > @@ -340,7 +340,7 @@ > "UMask": "0x1", > "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address partially overlaps with a store", > + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with a store", > "Data_LA": "1" > }, > { > @@ -349,7 +349,7 @@ > "UMask": "0x2", > "EventName": "RECYCLEQ.LD_BLOCK_STD_NOTREADY", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load gets blocked because its address overlaps with a store whose data is not ready" > + "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address overlaps with a store whose data is not ready" > }, > { > "PublicDescription": "This event counts the number of retired store that experienced a cache line boundary split(Precise Event). Note that each spilt should be counted only once.", > @@ -358,7 +358,7 @@ > "UMask": "0x4", > "EventName": "RECYCLEQ.ST_SPLITS", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired store that is a cache line split. Each split should be counted only once." > + "BriefDescription": "Counts the number of occurrences a retired store that is a cache line split. Each split should be counted only once." > }, > { > "PEBS": "1", > @@ -367,7 +367,7 @@ > "UMask": "0x8", > "EventName": "RECYCLEQ.LD_SPLITS", > "SampleAfterValue": "200003", > - "BriefDescription": "Counts the number of occurences a retired load that is a cache line split. Each split should be counted only once.", > + "BriefDescription": "Counts the number of occurrences a retired load that is a cache line split. Each split should be counted only once.", > "Data_LA": "1" > }, > { > diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > index b7150f65f16d..d69db55f33e7 100644 > --- a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > +++ b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json > @@ -108,7 +108,7 @@ > "EdgeDetect": "1", > "EventName": "INT_MISC.RECOVERY_STALLS_COUNT", > "SampleAfterValue": "2000003", > - "BriefDescription": "Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > + "BriefDescription": "Number of occurrences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...).", > "CounterMask": "1", > "CounterHTOff": "0,1,2,3,4,5,6,7" > }, > -- > 2.25.1 > -- - Arnaldo ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-03-16 13:58 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-04-27 18:52 [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" Colin King 2018-04-27 18:52 ` Colin King 2018-04-30 13:52 ` Arnaldo Carvalho de Melo 2018-04-30 13:52 ` Arnaldo Carvalho de Melo 2018-04-30 15:29 ` Andi Kleen 2018-04-30 15:29 ` Andi Kleen 2020-03-16 9:38 ` [PATCH] perf vendor events: fix spelling mistakes: "occurences" -> "occurrences" Colin King 2020-03-16 9:38 ` Colin King 2020-03-16 13:58 ` Arnaldo Carvalho de Melo 2020-03-16 13:58 ` Arnaldo Carvalho de Melo
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