* [PATCH 1/3] x86: verify_cpu: use 32-bit arithmetic
@ 2018-05-17 21:30 Alexey Dobriyan
2018-05-17 22:45 ` hpa
0 siblings, 1 reply; 2+ messages in thread
From: Alexey Dobriyan @ 2018-05-17 21:30 UTC (permalink / raw)
To: tglx, mingo, hpa; +Cc: x86, linux-kernel
32-bit instructions are 1 byte shorter than 16-bit instructions.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
---
arch/x86/kernel/verify_cpu.S | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -56,14 +56,14 @@ ENTRY(verify_cpu)
cmpl $0x1,%eax
jb .Lverify_cpu_no_longmode # no cpuid 1
- xor %di,%di
+ xor %edi, %edi
cmpl $0x68747541,%ebx # AuthenticAMD
jnz .Lverify_cpu_noamd
cmpl $0x69746e65,%edx
jnz .Lverify_cpu_noamd
cmpl $0x444d4163,%ecx
jnz .Lverify_cpu_noamd
- mov $1,%di # cpu is from AMD
+ mov $1, %edi # cpu is from AMD
jmp .Lverify_cpu_check
.Lverify_cpu_noamd:
@@ -122,13 +122,13 @@ ENTRY(verify_cpu)
andl $SSE_MASK,%edx
cmpl $SSE_MASK,%edx
je .Lverify_cpu_sse_ok
- test %di,%di
+ test %edi, %edi
jz .Lverify_cpu_no_longmode # only try to force SSE on AMD
movl $MSR_K7_HWCR,%ecx
rdmsr
btr $15,%eax # enable SSE
wrmsr
- xor %di,%di # don't loop
+ xor %edi, %edi # don't loop
jmp .Lverify_cpu_sse_test # try again
.Lverify_cpu_no_longmode:
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 1/3] x86: verify_cpu: use 32-bit arithmetic
2018-05-17 21:30 [PATCH 1/3] x86: verify_cpu: use 32-bit arithmetic Alexey Dobriyan
@ 2018-05-17 22:45 ` hpa
0 siblings, 0 replies; 2+ messages in thread
From: hpa @ 2018-05-17 22:45 UTC (permalink / raw)
To: Alexey Dobriyan, tglx, mingo; +Cc: x86, linux-kernel
On May 17, 2018 2:30:01 PM PDT, Alexey Dobriyan <adobriyan@gmail.com> wrote:
>32-bit instructions are 1 byte shorter than 16-bit instructions.
>
>Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
>---
>
> arch/x86/kernel/verify_cpu.S | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>--- a/arch/x86/kernel/verify_cpu.S
>+++ b/arch/x86/kernel/verify_cpu.S
>@@ -56,14 +56,14 @@ ENTRY(verify_cpu)
> cmpl $0x1,%eax
> jb .Lverify_cpu_no_longmode # no cpuid 1
>
>- xor %di,%di
>+ xor %edi, %edi
> cmpl $0x68747541,%ebx # AuthenticAMD
> jnz .Lverify_cpu_noamd
> cmpl $0x69746e65,%edx
> jnz .Lverify_cpu_noamd
> cmpl $0x444d4163,%ecx
> jnz .Lverify_cpu_noamd
>- mov $1,%di # cpu is from AMD
>+ mov $1, %edi # cpu is from AMD
> jmp .Lverify_cpu_check
>
> .Lverify_cpu_noamd:
>@@ -122,13 +122,13 @@ ENTRY(verify_cpu)
> andl $SSE_MASK,%edx
> cmpl $SSE_MASK,%edx
> je .Lverify_cpu_sse_ok
>- test %di,%di
>+ test %edi, %edi
> jz .Lverify_cpu_no_longmode # only try to force SSE on AMD
> movl $MSR_K7_HWCR,%ecx
> rdmsr
> btr $15,%eax # enable SSE
> wrmsr
>- xor %di,%di # don't loop
>+ xor %edi, %edi # don't loop
> jmp .Lverify_cpu_sse_test # try again
>
> .Lverify_cpu_no_longmode:
Well, in 32/64-bit mode... this code is also assembled in 16-bit mode, and the 16-but code is more space sensitive.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
^ permalink raw reply [flat|nested] 2+ messages in thread
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