All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ross Zwisler <ross.zwisler@linux.intel.com>
To: "Elliott, Robert (Persistent Memory)" <elliott@hpe.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
	linux-nvdimm <linux-nvdimm@lists.01.org>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	Stefan Hajnoczi <stefanha@redhat.com>,
	Igor Mammedov <imammedo@redhat.com>
Subject: Re: [qemu PATCH v2 3/4] nvdimm, acpi: support NFIT platform capabilities
Date: Mon, 21 May 2018 09:54:49 -0600	[thread overview]
Message-ID: <20180521155449.GA22635@linux.intel.com> (raw)
In-Reply-To: <AT5PR8401MB11694A7F7825A488105AEFADAB900@AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM>

On Fri, May 18, 2018 at 04:37:10PM +0000, Elliott, Robert (Persistent Memory) wrote:
> 
> 
> ...
> > Would it help to show them in hex?
> > 
> >   As of ACPI 6.2 Errata A, the following values are valid for the bottom
> >   two bits:
> > 
> >   0x2 - Memory Controller Flush to NVDIMM Durability on Power Loss Capable.
> >   0x3 - CPU Cache Flush to NVDIMM Durability on Power Loss Capable.
> 
> Yes, that helps (unless the parser for that command-line does not 
> accept hex values).

Yep, the command-line parser does accept hex values.  I ended up just trying
to make the text clearer, though.

> It would also help to make the text be:
> 	"CPU Cache and Memory Controller Flush"

My descriptions for the bits are coming straight out of ACPI. :)  I'd prefer
to stay consistent with what's written in the spec.
_______________________________________________
Linux-nvdimm mailing list
Linux-nvdimm@lists.01.org
https://lists.01.org/mailman/listinfo/linux-nvdimm

WARNING: multiple messages have this Message-ID (diff)
From: Ross Zwisler <ross.zwisler@linux.intel.com>
To: "Elliott, Robert (Persistent Memory)" <elliott@hpe.com>
Cc: 'Ross Zwisler' <ross.zwisler@linux.intel.com>,
	Igor Mammedov <imammedo@redhat.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	Eduardo Habkost <ehabkost@redhat.com>,
	linux-nvdimm <linux-nvdimm@lists.01.org>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Stefan Hajnoczi <stefanha@redhat.com>
Subject: Re: [Qemu-devel] [qemu PATCH v2 3/4] nvdimm, acpi: support NFIT platform capabilities
Date: Mon, 21 May 2018 09:54:49 -0600	[thread overview]
Message-ID: <20180521155449.GA22635@linux.intel.com> (raw)
In-Reply-To: <AT5PR8401MB11694A7F7825A488105AEFADAB900@AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM>

On Fri, May 18, 2018 at 04:37:10PM +0000, Elliott, Robert (Persistent Memory) wrote:
> 
> 
> ...
> > Would it help to show them in hex?
> > 
> >   As of ACPI 6.2 Errata A, the following values are valid for the bottom
> >   two bits:
> > 
> >   0x2 - Memory Controller Flush to NVDIMM Durability on Power Loss Capable.
> >   0x3 - CPU Cache Flush to NVDIMM Durability on Power Loss Capable.
> 
> Yes, that helps (unless the parser for that command-line does not 
> accept hex values).

Yep, the command-line parser does accept hex values.  I ended up just trying
to make the text clearer, though.

> It would also help to make the text be:
> 	"CPU Cache and Memory Controller Flush"

My descriptions for the bits are coming straight out of ACPI. :)  I'd prefer
to stay consistent with what's written in the spec.

  parent reply	other threads:[~2018-05-21 15:54 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-17  5:00 [qemu PATCH v2 0/4] support NFIT platform capabilities Ross Zwisler
2018-05-17  5:00 ` [Qemu-devel] " Ross Zwisler
2018-05-17  5:00 ` [qemu PATCH v2 1/4] nvdimm: fix typo in label-size definition Ross Zwisler
2018-05-17  5:00   ` [Qemu-devel] " Ross Zwisler
2018-05-17  5:00 ` [qemu PATCH v2 2/4] tests/.gitignore: add entry for generated file Ross Zwisler
2018-05-17  5:00   ` [Qemu-devel] " Ross Zwisler
2018-05-17  5:00 ` [qemu PATCH v2 3/4] nvdimm, acpi: support NFIT platform capabilities Ross Zwisler
2018-05-17  5:00   ` [Qemu-devel] " Ross Zwisler
2018-05-17 22:06   ` Elliott, Robert (Persistent Memory)
2018-05-17 22:06     ` [Qemu-devel] " Elliott, Robert (Persistent Memory)
2018-05-18 15:23     ` Ross Zwisler
2018-05-18 15:23       ` [Qemu-devel] " Ross Zwisler
2018-05-18 16:37       ` Elliott, Robert (Persistent Memory)
2018-05-18 16:37         ` [Qemu-devel] " Elliott, Robert (Persistent Memory)
2018-05-18 19:31         ` Ross Zwisler
2018-05-18 19:31           ` [Qemu-devel] " Ross Zwisler
2018-05-21 15:54         ` Ross Zwisler [this message]
2018-05-21 15:54           ` Ross Zwisler
2018-05-17  5:00 ` [qemu PATCH v2 4/4] ACPI testing: test " Ross Zwisler
2018-05-17  5:00   ` [Qemu-devel] " Ross Zwisler
2018-05-17  5:08 ` [Qemu-devel] [qemu PATCH v2 0/4] support " no-reply
2018-05-17  5:08   ` no-reply
2018-05-17 15:32   ` [qemu PATCH v3 3/4] nvdimm, acpi: " Ross Zwisler
2018-05-17 15:32     ` [Qemu-devel] " Ross Zwisler

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180521155449.GA22635@linux.intel.com \
    --to=ross.zwisler@linux.intel.com \
    --cc=ehabkost@redhat.com \
    --cc=elliott@hpe.com \
    --cc=imammedo@redhat.com \
    --cc=linux-nvdimm@lists.01.org \
    --cc=mst@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=stefanha@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.