From: Rik van Riel <riel@surriel.com>
To: linux-kernel@vger.kernel.org
Cc: 86@vger.kernel.org, luto@kernel.org, mingo@kernel.org,
tglx@linutronix.de, dave.hansen@linux.intel.com, efault@gmx.de,
songliubraving@fb.com, kernel-team@fb.com,
Rik van Riel <riel@surriel.com>
Subject: [PATCH 3/7] x86,tlb: change tlbstate.is_lazy to tlbstate.state
Date: Wed, 20 Jun 2018 15:56:48 -0400 [thread overview]
Message-ID: <20180620195652.27251-4-riel@surriel.com> (raw)
In-Reply-To: <20180620195652.27251-1-riel@surriel.com>
Replace the tlbstate.is_lazy boolean with a tlbstate.state int,
so more states can be expressed. This is a preparation for the
next patch.
Signed-off-by: Rik van Riel <riel@surriel.com>
Tested-by: Song Liu <songliubraving@fb.com>
---
arch/x86/include/asm/tlbflush.h | 11 +++++++----
arch/x86/mm/tlb.c | 10 +++++-----
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 3aa3204b5dc0..88a4d6b87ff7 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -169,6 +169,9 @@ struct tlb_context {
u64 tlb_gen;
};
+#define TLBSTATE_OK 0
+#define TLBSTATE_LAZY 1
+
struct tlb_state {
/*
* cpu_tlbstate.loaded_mm should match CR3 whenever interrupts
@@ -186,18 +189,18 @@ struct tlb_state {
* We can be in one of several states:
*
* - Actively using an mm. Our CPU's bit will be set in
- * mm_cpumask(loaded_mm) and is_lazy == false;
+ * mm_cpumask(loaded_mm) and state == TLBSTATE_OK
*
* - Not using a real mm. loaded_mm == &init_mm. Our CPU's bit
- * will not be set in mm_cpumask(&init_mm) and is_lazy == false.
+ * will not be set in mm_cpumask(&init_mm) and state == TLBSTATE_OK
*
* - Lazily using a real mm. loaded_mm != &init_mm, our bit
- * is set in mm_cpumask(loaded_mm), but is_lazy == true.
+ * is set in mm_cpumask(loaded_mm), but state == TLBSTATE_LAZY.
* We're heuristically guessing that the CR3 load we
* skipped more than makes up for the overhead added by
* lazy mode.
*/
- bool is_lazy;
+ int state;
/*
* If set we changed the page tables in such a way that we
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 61773b07ed54..e063e623e52c 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -136,7 +136,7 @@ void leave_mm(int cpu)
return;
/* Warn if we're not lazy. */
- WARN_ON(!this_cpu_read(cpu_tlbstate.is_lazy));
+ WARN_ON((this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK));
switch_mm(NULL, &init_mm, NULL);
}
@@ -227,7 +227,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
__flush_tlb_all();
}
#endif
- this_cpu_write(cpu_tlbstate.is_lazy, false);
+ this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
/*
* The membarrier system call requires a full memory barrier and
@@ -364,7 +364,7 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
* old mm loaded and only switch to init_mm when
* tlb_remove_page() happens.
*/
- this_cpu_write(cpu_tlbstate.is_lazy, true);
+ this_cpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
} else {
switch_mm(NULL, &init_mm, NULL);
}
@@ -448,7 +448,7 @@ static void flush_tlb_func_common(const struct flush_tlb_info *f,
VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].ctx_id) !=
loaded_mm->context.ctx_id);
- if (this_cpu_read(cpu_tlbstate.is_lazy)) {
+ if (this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK) {
/*
* We're in lazy mode. We need to at least flush our
* paging-structure cache to avoid speculatively reading
@@ -651,7 +651,7 @@ void tlb_flush_remove_tables_local(void *arg)
struct mm_struct *mm = arg;
if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm &&
- this_cpu_read(cpu_tlbstate.is_lazy))
+ this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
/*
* We're in lazy mode. We need to at least flush our
* paging-structure cache to avoid speculatively reading
--
2.14.4
next prev parent reply other threads:[~2018-06-20 19:57 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 19:56 [PATCH 0/7] x86,tlb,mm: make lazy TLB mode even lazier Rik van Riel
2018-06-20 19:56 ` [PATCH 1/7] mm: allocate mm_cpumask dynamically based on nr_cpu_ids Rik van Riel
2018-06-20 21:32 ` kbuild test robot
2018-06-21 20:18 ` Rik van Riel
2018-06-21 0:24 ` kbuild test robot
2018-06-22 15:10 ` Dave Hansen
2018-06-22 17:45 ` Rik van Riel
2018-06-20 19:56 ` [PATCH 2/7] x86,tlb: leave lazy TLB mode at page table free time Rik van Riel
2018-06-21 0:23 ` Rik van Riel
2018-06-22 14:58 ` Andy Lutomirski
2018-06-22 15:17 ` Rik van Riel
2018-06-20 19:56 ` Rik van Riel [this message]
2018-06-22 17:01 ` [PATCH 3/7] x86,tlb: change tlbstate.is_lazy to tlbstate.state Dave Hansen
2018-06-22 17:08 ` Rik van Riel
2018-06-20 19:56 ` [PATCH 4/7] x86,tlb: make lazy TLB mode lazier Rik van Riel
2018-06-22 15:04 ` Andy Lutomirski
2018-06-22 15:15 ` Rik van Riel
2018-06-22 15:34 ` Andy Lutomirski
2018-06-22 17:05 ` Dave Hansen
2018-06-22 17:16 ` Rik van Riel
2018-06-20 19:56 ` [PATCH 5/7] x86,tlb: only send page table free TLB flush to lazy TLB CPUs Rik van Riel
2018-06-22 17:23 ` Dave Hansen
2018-06-20 19:56 ` [PATCH 6/7] x86,mm: always use lazy TLB mode Rik van Riel
2018-06-20 19:56 ` [PATCH 7/7] x86,idle: do not leave mm in idle state Rik van Riel
2018-06-20 22:20 ` kbuild test robot
2018-06-21 0:25 ` Rik van Riel
2018-06-22 15:36 ` Andy Lutomirski
2018-06-22 15:53 ` Rik van Riel
2018-06-22 16:01 ` Andy Lutomirski
2018-06-22 20:18 ` Rik van Riel
2018-06-22 22:05 ` Andy Lutomirski
2018-06-23 0:55 ` Rik van Riel
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