[MODERATED] [PATCH v2.1 0/6] On top of Thomas+Paolo's

[konrad.wilk@oracle.com]

Hey,

This patchset replaces Paolo's second patch but also adds the warnings
that Linus wanted. Along with some extra knobs in case the MSR will
have more things in the future.

Oh, and one bug-fix.

I am also working on using the VMX Load MSR list so that the L1D flush
happens automatically on VMENTER.


Konrad Rzeszutek Wilk (5):
      x86/bugs: Move the l1tf function and define pr_fmt properly
      x86/cpufeatures: Add detection of L1D cache flush support.
      x86/bugs: Read FLUSH_CMD MSR during boot.
      x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
      x86/KVM: Use L1 cache flush before VMENTER if available.

Paolo Bonzini (1):
      kvm: x86: mitigation for L1 cache terminal fault vulnerabilities

 Documentation/admin-guide/kernel-parameters.txt |  4 ++
 arch/x86/include/asm/cpu.h                      |  4 ++
 arch/x86/include/asm/cpufeatures.h              |  1 +
 arch/x86/include/asm/kvm_host.h                 |  7 ++-
 arch/x86/include/asm/msr-index.h                |  6 ++
 arch/x86/kernel/cpu/bugs.c                      | 83 +++++++++++++++++--------
 arch/x86/kvm/mmu.c                              |  1 +
 arch/x86/kvm/svm.c                              |  3 +-
 arch/x86/kvm/vmx.c                              | 46 +++++++++++++-
 arch/x86/kvm/x86.c                              | 80 +++++++++++++++++++++++-
 kernel/cpu.c                                    |  1 +
 11 files changed, 205 insertions(+), 31 deletions(-)