From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 3/3] irqchip: RISC-V Local Interrupt Controller Driver
Date: Sat, 23 Jun 2018 00:28:24 -0700 [thread overview]
Message-ID: <20180623072824.GC25573@infradead.org> (raw)
In-Reply-To: <20180622232006.12158-4-palmer@sifive.com>
> +config RISCV_INTC
> + #bool "RISC-V Interrupt Controller"
> + depends on RISCV
> + default y
> + help
> + This enables support for the local interrupt controller found in
> + standard RISC-V systems. The local interrupt controller handles
> + timer interrupts, software interrupts, and hardware interrupts.
> + Without a local interrupt controller the system will be unable to
> + handle any interrupts, including those passed via the PLIC.
This can just be:
config RISCV_INTC
def_bool y if RISCV
depends on RISCV
as this isn't a user selectable option.
> index 000000000000..7ca3060e76b4
> --- /dev/null
> +++ b/drivers/irqchip/irq-riscv-intc.c
> @@ -0,0 +1,215 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2017-2018 SiFive
> + */
> +/* SPDX-License-Identifier: GPL-2.0 */
SPDX tags need to be the first thing in the file, and use // -style
comments.
FYI, I've got a version with this and a few other cleanups here:
http://git.infradead.org/users/hch/riscv.git/commitdiff/d0789843f663ba8a6573ac5f73d8b6f999c8e6ed
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
aou@eecs.berkeley.edu, jason@lakedaemon.net,
marc.zyngier@arm.com, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
shorne@gmail.com, tglx@linutronix.de,
Michael Clark <mjc@sifive.com>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 3/3] irqchip: RISC-V Local Interrupt Controller Driver
Date: Sat, 23 Jun 2018 00:28:24 -0700 [thread overview]
Message-ID: <20180623072824.GC25573@infradead.org> (raw)
In-Reply-To: <20180622232006.12158-4-palmer@sifive.com>
> +config RISCV_INTC
> + #bool "RISC-V Interrupt Controller"
> + depends on RISCV
> + default y
> + help
> + This enables support for the local interrupt controller found in
> + standard RISC-V systems. The local interrupt controller handles
> + timer interrupts, software interrupts, and hardware interrupts.
> + Without a local interrupt controller the system will be unable to
> + handle any interrupts, including those passed via the PLIC.
This can just be:
config RISCV_INTC
def_bool y if RISCV
depends on RISCV
as this isn't a user selectable option.
> index 000000000000..7ca3060e76b4
> --- /dev/null
> +++ b/drivers/irqchip/irq-riscv-intc.c
> @@ -0,0 +1,215 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2017-2018 SiFive
> + */
> +/* SPDX-License-Identifier: GPL-2.0 */
SPDX tags need to be the first thing in the file, and use // -style
comments.
FYI, I've got a version with this and a few other cleanups here:
http://git.infradead.org/users/hch/riscv.git/commitdiff/d0789843f663ba8a6573ac5f73d8b6f999c8e6ed
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com,
robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
linux-kernel@vger.kernel.org, Michael Clark <mjc@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, shorne@gmail.com
Subject: Re: [PATCH 3/3] irqchip: RISC-V Local Interrupt Controller Driver
Date: Sat, 23 Jun 2018 00:28:24 -0700 [thread overview]
Message-ID: <20180623072824.GC25573@infradead.org> (raw)
In-Reply-To: <20180622232006.12158-4-palmer@sifive.com>
> +config RISCV_INTC
> + #bool "RISC-V Interrupt Controller"
> + depends on RISCV
> + default y
> + help
> + This enables support for the local interrupt controller found in
> + standard RISC-V systems. The local interrupt controller handles
> + timer interrupts, software interrupts, and hardware interrupts.
> + Without a local interrupt controller the system will be unable to
> + handle any interrupts, including those passed via the PLIC.
This can just be:
config RISCV_INTC
def_bool y if RISCV
depends on RISCV
as this isn't a user selectable option.
> index 000000000000..7ca3060e76b4
> --- /dev/null
> +++ b/drivers/irqchip/irq-riscv-intc.c
> @@ -0,0 +1,215 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2017-2018 SiFive
> + */
> +/* SPDX-License-Identifier: GPL-2.0 */
SPDX tags need to be the first thing in the file, and use // -style
comments.
FYI, I've got a version with this and a few other cleanups here:
http://git.infradead.org/users/hch/riscv.git/commitdiff/d0789843f663ba8a6573ac5f73d8b6f999c8e6ed
next prev parent reply other threads:[~2018-06-23 7:28 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 23:20 Driver for the RISC-V Interrupt Controller Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-22 23:20 ` [PATCH 1/3] RISC-V: Don't include irq-riscv-intc.h Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-23 7:25 ` Christoph Hellwig
2018-06-23 7:25 ` Christoph Hellwig
2018-06-23 7:25 ` Christoph Hellwig
2018-06-22 23:20 ` [PATCH 2/3] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-25 20:04 ` Christoph Böhmwalder
2018-06-25 20:04 ` Christoph Böhmwalder
2018-06-25 20:04 ` Christoph Böhmwalder
2018-08-02 20:30 ` Palmer Dabbelt
2018-08-02 20:30 ` Palmer Dabbelt
2018-07-03 20:10 ` Rob Herring
2018-07-03 20:10 ` Rob Herring
2018-06-22 23:20 ` [PATCH 3/3] irqchip: RISC-V Local Interrupt Controller Driver Palmer Dabbelt
2018-06-22 23:20 ` Palmer Dabbelt
2018-06-23 0:08 ` Randy Dunlap
2018-06-23 0:08 ` Randy Dunlap
2018-06-23 0:08 ` Randy Dunlap
2018-08-02 18:30 ` Palmer Dabbelt
2018-08-02 18:30 ` Palmer Dabbelt
2018-06-23 7:28 ` Christoph Hellwig [this message]
2018-06-23 7:28 ` Christoph Hellwig
2018-06-23 7:28 ` Christoph Hellwig
2018-06-23 8:56 ` Thomas Gleixner
2018-06-23 8:56 ` Thomas Gleixner
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