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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: "Antoine Tenart" <antoine.tenart@bootlin.com>,
	linux-pci@vger.kernel.org,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
	"Nadav Haklai" <nadavh@marvell.com>,
	"Victor Gu" <xigu@marvell.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Zachary Zhang" <zhangzg@marvell.com>,
	"Wilson Ding" <dingwei@marvell.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] PCI: aardvark: Size bridges before resources allocation
Date: Thu, 5 Jul 2018 15:15:22 +0100	[thread overview]
Message-ID: <20180705141522.GA13716@red-moon> (raw)
In-Reply-To: <20180629091620.31503-2-thomas.petazzoni@bootlin.com>

On Fri, Jun 29, 2018 at 11:16:19AM +0200, Thomas Petazzoni wrote:
> From: Zachary Zhang <zhangzg@marvell.com>
> 
> The PCIE I/O and MEM resource allocation mechanism is that root bus
> goes through the following steps:
> 
> 1. Check PCI bridges' range and computes I/O and Mem base/limits.
> 
> 2. Sort all subordinate devices I/O and MEM resource requirements and
>    allocate the resources and writes/updates subordinate devices'
>    requirements to PCI bridges I/O and Mem MEM/limits registers.
> 
> Currently, PCI Aardvark driver only handles the second step and lacks
> the first step, so there is an I/O and MEM resource allocation failure
> when using a PCI switch. This commit fixes that by sizing bridges
> before doing the resource allocation.
> 
> Signed-off-by: Zachary Zhang <zhangzg@marvell.com>
> [Thomas: edit commit log.]
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> ---
>  drivers/pci/controller/pci-aardvark.c | 1 +
>  1 file changed, 1 insertion(+)

Hi Thomas,

I am queueing these two patches but this one seems a serious bug,
I reckon we should send it to stable kernels (and would be grateful
if you provide me with a Fixes tag and a kernel log to add to the
commit log).

Thanks,
Lorenzo

> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 486c41721c89..8e92231214e3 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -1065,6 +1065,7 @@ static int advk_pcie_probe(struct platform_device *pdev)
>  
>  	bus = bridge->bus;
>  
> +	pci_bus_size_bridges(bus);
>  	pci_bus_assign_resources(bus);
>  
>  	list_for_each_entry(child, &bus->children, node)
> -- 
> 2.14.4
> 

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WARNING: multiple messages have this Message-ID (diff)
From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] PCI: aardvark: Size bridges before resources allocation
Date: Thu, 5 Jul 2018 15:15:22 +0100	[thread overview]
Message-ID: <20180705141522.GA13716@red-moon> (raw)
In-Reply-To: <20180629091620.31503-2-thomas.petazzoni@bootlin.com>

On Fri, Jun 29, 2018 at 11:16:19AM +0200, Thomas Petazzoni wrote:
> From: Zachary Zhang <zhangzg@marvell.com>
> 
> The PCIE I/O and MEM resource allocation mechanism is that root bus
> goes through the following steps:
> 
> 1. Check PCI bridges' range and computes I/O and Mem base/limits.
> 
> 2. Sort all subordinate devices I/O and MEM resource requirements and
>    allocate the resources and writes/updates subordinate devices'
>    requirements to PCI bridges I/O and Mem MEM/limits registers.
> 
> Currently, PCI Aardvark driver only handles the second step and lacks
> the first step, so there is an I/O and MEM resource allocation failure
> when using a PCI switch. This commit fixes that by sizing bridges
> before doing the resource allocation.
> 
> Signed-off-by: Zachary Zhang <zhangzg@marvell.com>
> [Thomas: edit commit log.]
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> ---
>  drivers/pci/controller/pci-aardvark.c | 1 +
>  1 file changed, 1 insertion(+)

Hi Thomas,

I am queueing these two patches but this one seems a serious bug,
I reckon we should send it to stable kernels (and would be grateful
if you provide me with a Fixes tag and a kernel log to add to the
commit log).

Thanks,
Lorenzo

> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 486c41721c89..8e92231214e3 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -1065,6 +1065,7 @@ static int advk_pcie_probe(struct platform_device *pdev)
>  
>  	bus = bridge->bus;
>  
> +	pci_bus_size_bridges(bus);
>  	pci_bus_assign_resources(bus);
>  
>  	list_for_each_entry(child, &bus->children, node)
> -- 
> 2.14.4
> 

  reply	other threads:[~2018-07-05 14:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-29  9:16 [PATCH 0/2] PCI: aardvark: misc improvements Thomas Petazzoni
2018-06-29  9:16 ` Thomas Petazzoni
2018-06-29  9:16 ` [PATCH 1/2] PCI: aardvark: Size bridges before resources allocation Thomas Petazzoni
2018-06-29  9:16   ` Thomas Petazzoni
2018-07-05 14:15   ` Lorenzo Pieralisi [this message]
2018-07-05 14:15     ` Lorenzo Pieralisi
2018-07-05 14:19     ` Thomas Petazzoni
2018-07-05 14:19       ` Thomas Petazzoni
2018-07-06 11:01       ` Lorenzo Pieralisi
2018-07-06 11:01         ` Lorenzo Pieralisi
2018-07-06 11:42         ` Thomas Petazzoni
2018-07-06 11:42           ` Thomas Petazzoni
2018-07-06 12:21           ` Lorenzo Pieralisi
2018-07-06 12:21             ` Lorenzo Pieralisi
2018-06-29  9:16 ` [PATCH 2/2] PCI: aardvark: Convert to use pci_host_probe() Thomas Petazzoni
2018-06-29  9:16   ` Thomas Petazzoni

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