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From: LABBE Corentin <clabbe@baylibre.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: linux@armlinux.org.uk, mark.rutland@arm.com,
	maxime.ripard@free-electrons.com, robh+dt@kernel.org,
	tj@kernel.org, wens@csie.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v2 0/4] sun8i: r40: add AHCI
Date: Tue, 10 Jul 2018 15:05:17 +0200	[thread overview]
Message-ID: <20180710130517.GA27236@Red> (raw)
In-Reply-To: <EF718AB4-DD07-4D67-BE2E-1B9EBA5EB25F@aosc.io>

On Mon, Jul 09, 2018 at 11:44:20PM +0800, Icenowy Zheng wrote:
> 
> 
> 于 2018年7月9日 GMT+08:00 下午11:20:54, Corentin Labbe <clabbe@baylibre.com> 写到:
> >Hello
> >
> >With Moeicenowy's agreement, I have take leadership ot this patchset.
> >
> >There are no really changes appart renaming struct quirck to variant.
> >
> >Since the last serie is really old, I will answer comment here.
> >The two regulator (1.2 and 2.5V) are not for the PHY since:
> >- nothing in the schematic said that they are for the PHY, they seems
> >  only for controller
> >- all other AHCI driver use 5V for the target/PHY (vs 1.2/2.5 which
> >  cannot be used for target)
> 
> Target is not equal to PHY. Target means the supply
> of the disk, which can be usually 5v (for 2.5" HDD) or
> 12v (3.5" HDD).
> 
> By reading Wikipedia articles  about SATA and LVDS, I assume
> 2.5V is for PHY and 1.2V is for internal digital logic (VDD-SYS
> is commonly 1.2V on 40nm Allwinner SoCs; 2.5V VDD can be
> used to efficiently deliver ~1.2V LVDS.)
> 
> P.S. VDD-SATA and VDD25-SATA also exist on A20, and by checking
> Banana Pi M1 (the original Banana Pi) schematics, VDD-SATA
> is connected to common VDD-SYS (called INTVDD on the
> schematics) and VDD25-SATA is connected to an always-on
> fixed LDO, maybe due to the lack of power outputs on AXP209.
> 

So we still need to add a regulator on the controller and add an optionnal "phy" regulator for AHCI port.

WARNING: multiple messages have this Message-ID (diff)
From: clabbe@baylibre.com (LABBE Corentin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/4] sun8i: r40: add AHCI
Date: Tue, 10 Jul 2018 15:05:17 +0200	[thread overview]
Message-ID: <20180710130517.GA27236@Red> (raw)
In-Reply-To: <EF718AB4-DD07-4D67-BE2E-1B9EBA5EB25F@aosc.io>

On Mon, Jul 09, 2018 at 11:44:20PM +0800, Icenowy Zheng wrote:
> 
> 
> ? 2018?7?9? GMT+08:00 ??11:20:54, Corentin Labbe <clabbe@baylibre.com> ??:
> >Hello
> >
> >With Moeicenowy's agreement, I have take leadership ot this patchset.
> >
> >There are no really changes appart renaming struct quirck to variant.
> >
> >Since the last serie is really old, I will answer comment here.
> >The two regulator (1.2 and 2.5V) are not for the PHY since:
> >- nothing in the schematic said that they are for the PHY, they seems
> >  only for controller
> >- all other AHCI driver use 5V for the target/PHY (vs 1.2/2.5 which
> >  cannot be used for target)
> 
> Target is not equal to PHY. Target means the supply
> of the disk, which can be usually 5v (for 2.5" HDD) or
> 12v (3.5" HDD).
> 
> By reading Wikipedia articles  about SATA and LVDS, I assume
> 2.5V is for PHY and 1.2V is for internal digital logic (VDD-SYS
> is commonly 1.2V on 40nm Allwinner SoCs; 2.5V VDD can be
> used to efficiently deliver ~1.2V LVDS.)
> 
> P.S. VDD-SATA and VDD25-SATA also exist on A20, and by checking
> Banana Pi M1 (the original Banana Pi) schematics, VDD-SATA
> is connected to common VDD-SYS (called INTVDD on the
> schematics) and VDD25-SATA is connected to an always-on
> fixed LDO, maybe due to the lack of power outputs on AXP209.
> 

So we still need to add a regulator on the controller and add an optionnal "phy" regulator for AHCI port.

  reply	other threads:[~2018-07-10 13:05 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-09 15:20 [PATCH v2 0/4] sun8i: r40: add AHCI Corentin Labbe
2018-07-09 15:20 ` Corentin Labbe
2018-07-09 15:20 ` [PATCH v2 1/4] dt-bindings: add binding for Allwinner R40 SATA AHCI controller Corentin Labbe
2018-07-09 15:20   ` Corentin Labbe
     [not found]   ` <1531149658-27030-2-git-send-email-clabbe-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2018-07-11 19:12     ` Rob Herring
2018-07-11 19:12       ` Rob Herring
2018-07-11 19:12       ` Rob Herring
2018-07-09 15:20 ` [PATCH v2 2/4] ata: ahci_sunxi: add support for R40 SATA controller Corentin Labbe
2018-07-09 15:20   ` Corentin Labbe
2018-07-09 15:20   ` Corentin Labbe
2018-07-09 15:20 ` [PATCH v2 3/4] ARM: dts: sun8i: r40: add sata node Corentin Labbe
2018-07-09 15:20   ` Corentin Labbe
2018-07-09 15:20 ` [PATCH v2 4/4] ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI Corentin Labbe
2018-07-09 15:20   ` Corentin Labbe
     [not found] ` <1531149658-27030-1-git-send-email-clabbe-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2018-07-09 15:44   ` [PATCH v2 0/4] sun8i: r40: add AHCI Icenowy Zheng
2018-07-09 15:44     ` Icenowy Zheng
2018-07-09 15:44     ` Icenowy Zheng
2018-07-10 13:05     ` LABBE Corentin [this message]
2018-07-10 13:05       ` LABBE Corentin
2018-07-10 13:15       ` Icenowy Zheng
2018-07-10 13:15         ` Icenowy Zheng
2018-07-10 12:29   ` Maxime Ripard
2018-07-10 12:29     ` Maxime Ripard
2018-07-10 12:29     ` Maxime Ripard
2018-07-10 12:32     ` Icenowy Zheng
2018-07-10 12:32       ` Icenowy Zheng
2018-07-10 12:32       ` Icenowy Zheng
2018-07-11 18:59     ` LABBE Corentin
2018-07-11 18:59       ` LABBE Corentin

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