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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 0/7] arm64: perf: Support for chained counters
Date: Tue, 10 Jul 2018 15:31:06 +0100	[thread overview]
Message-ID: <20180710143105.GC9022@arm.com> (raw)
In-Reply-To: <1531213084-27417-1-git-send-email-suzuki.poulose@arm.com>

Hi Suzuki,

On Tue, Jul 10, 2018 at 09:57:57AM +0100, Suzuki K Poulose wrote:
> This series adds support for counting PMU events using 64bit counters
> for arm64 PMU.
> 
> The Arm v8 PMUv3 supports combining two adjacent 32bit counters
> (low even and hig odd counters) to count a given "event" in 64bit mode.
> This series adds the support for 64bit events in the core arm_pmu driver
> infrastructure and adds the support for armv8 64bit kernel PMU to use
> chained counters to count in 64bit mode. For CPU cycles, we use the cycle
> counter in 64bit mode, only when requested. If the cycle counter is not
> available, we fall back to chaining the counters.
> 
> Tested on Juno, Fast models. Applies on 4.18-rc4

Thanks, this looks pretty good to me. How far did you get with the perf
fuzzer?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, mark.rutland@arm.com,
	julien.thierry@arm.com, robin.murphy@arm.com
Subject: Re: [PATCH v5 0/7] arm64: perf: Support for chained counters
Date: Tue, 10 Jul 2018 15:31:06 +0100	[thread overview]
Message-ID: <20180710143105.GC9022@arm.com> (raw)
In-Reply-To: <1531213084-27417-1-git-send-email-suzuki.poulose@arm.com>

Hi Suzuki,

On Tue, Jul 10, 2018 at 09:57:57AM +0100, Suzuki K Poulose wrote:
> This series adds support for counting PMU events using 64bit counters
> for arm64 PMU.
> 
> The Arm v8 PMUv3 supports combining two adjacent 32bit counters
> (low even and hig odd counters) to count a given "event" in 64bit mode.
> This series adds the support for 64bit events in the core arm_pmu driver
> infrastructure and adds the support for armv8 64bit kernel PMU to use
> chained counters to count in 64bit mode. For CPU cycles, we use the cycle
> counter in 64bit mode, only when requested. If the cycle counter is not
> available, we fall back to chaining the counters.
> 
> Tested on Juno, Fast models. Applies on 4.18-rc4

Thanks, this looks pretty good to me. How far did you get with the perf
fuzzer?

Will

  parent reply	other threads:[~2018-07-10 14:31 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-10  8:57 [PATCH v5 0/7] arm64: perf: Support for chained counters Suzuki K Poulose
2018-07-10  8:57 ` Suzuki K Poulose
2018-07-10  8:57 ` [PATCH v5 1/7] arm_pmu: Clean up maximum period handling Suzuki K Poulose
2018-07-10  8:57   ` Suzuki K Poulose
2018-07-10  8:57 ` [PATCH v5 2/7] arm_pmu: Change API to support 64bit counter values Suzuki K Poulose
2018-07-10  8:57   ` Suzuki K Poulose
2018-07-10  8:58 ` [PATCH v5 3/7] arm_pmu: Add support for 64bit event counters Suzuki K Poulose
2018-07-10  8:58   ` Suzuki K Poulose
2018-07-10  8:58 ` [PATCH v5 4/7] arm_pmu: Tidy up clear_event_idx call backs Suzuki K Poulose
2018-07-10  8:58   ` Suzuki K Poulose
2018-07-10  8:58 ` [PATCH v5 5/7] arm64: perf: Clean up armv8pmu_select_counter Suzuki K Poulose
2018-07-10  8:58   ` Suzuki K Poulose
2018-07-10  8:58 ` [PATCH v5 6/7] arm64: perf: Disable PMU while processing counter overflows Suzuki K Poulose
2018-07-10  8:58   ` Suzuki K Poulose
2018-07-10  8:58 ` [PATCH v5 7/7] arm64: perf: Add support for chaining event counters Suzuki K Poulose
2018-07-10  8:58   ` Suzuki K Poulose
2018-07-10 17:18   ` Mark Rutland
2018-07-10 17:18     ` Mark Rutland
2018-07-10 14:31 ` Will Deacon [this message]
2018-07-10 14:31   ` [PATCH v5 0/7] arm64: perf: Support for chained counters Will Deacon
2018-07-10 15:01   ` Suzuki K Poulose
2018-07-10 15:01     ` Suzuki K Poulose

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