From: Will Deacon <will.deacon@arm.com>
To: 陈华才 <chenhc@lemote.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Paul Burton <paul.burton@mips.com>,
Ralf Baechle <ralf@linux-mips.org>,
James Hogan <jhogan@kernel.org>,
linux-mips <linux-mips@linux-mips.org>,
Fuxin Zhang <zhangfx@lemote.com>,
wuzhangjin <wuzhangjin@gmail.com>,
stable <stable@vger.kernel.org>,
Alan Stern <stern@rowland.harvard.edu>,
Andrea Parri <andrea.parri@amarulasolutions.com>,
Boqun Feng <boqun.feng@gmail.com>,
Nicholas Piggin <npiggin@gmail.com>,
David Howells <dhowells@redhat.com>,
Jade Alglave <j.alglave@ucl.ac.uk>,
Luc Maranget <luc.maranget@inria.fr>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Akira Yokosawa <akiyks@gmail.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] MIPS: implement smp_cond_load_acquire() for Loongson-3
Date: Wed, 11 Jul 2018 10:43:39 +0100 [thread overview]
Message-ID: <20180711094338.GD13963@arm.com> (raw)
In-Reply-To: <tencent_26F8B9E004D4512B2225FCE1@qq.com>
Hi Huacai,
On Tue, Jul 10, 2018 at 07:45:22PM +0800, 陈华才 wrote:
> I don't think this is a hardware bug, in design, SFB will flushed to L1
> cache in three cases:
> 1, data in SFB is full (be a complete cache line);
> 2, there is a subsequent read access in the same cache line;
> 3, a 'sync' instruction is executed.
I'd expect successful LL/SC, cache maintenance (and potentially TLB)
operations to flush your SFB as well, not that I think that provides a
better workaround than throwing a 'sync' into cpu_relax(). I assume the
SFB is all physically addressed?
Generally, CPU architectures guarantee that store buffers drain "in finite
time" which is a pretty crappy guarantee, but one which tends to be
sufficient in practice and therefore relied upon by software.
Will
prev parent reply other threads:[~2018-07-11 9:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 2:26 [PATCH V2] MIPS: implement smp_cond_load_acquire() for Loongson-3 Huacai Chen
2018-07-09 16:49 ` Paul Burton
2018-07-10 4:26 ` Huacai Chen
2018-07-10 9:36 ` Peter Zijlstra
2018-07-10 10:54 ` Peter Zijlstra
2018-07-10 11:45 ` 陈华才
2018-07-10 12:17 ` Peter Zijlstra
2018-07-10 16:14 ` Paul E. McKenney
2018-07-10 17:10 ` Paul Burton
2018-07-10 17:10 ` Paul Burton
2018-07-10 17:10 ` Paul Burton
2018-07-11 10:04 ` David Laight
2018-07-11 10:55 ` Peter Zijlstra
2018-07-11 10:05 ` Jiaxun Yang
2018-07-11 10:21 ` Will Deacon
2018-07-11 11:09 ` Peter Zijlstra
2018-07-11 11:46 ` David Laight
2018-07-11 9:43 ` Will Deacon [this message]
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