From: Christoph Hellwig <hch@lst.de>
To: Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
Stafford Horne <shorne@gmail.com>
Cc: openrisc@lists.librecores.org, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/4] openrisc: remove the sync_single_for_cpu DMA operation
Date: Thu, 19 Jul 2018 06:02:29 -0700 [thread overview]
Message-ID: <20180719130232.1819-2-hch@lst.de> (raw)
In-Reply-To: <20180719130232.1819-1-hch@lst.de>
openrisc does all the required cache maintainance at dma map time, and none
at unmap time. It thus has to implement sync_single_for_device to match
the map cace for buffer reuse, but there is no point in doing another
invalidation in the sync_single_cpu_case, which in terms of cache
maintainance is equivalent to the unmap case.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/openrisc/kernel/dma.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c
index ec7fd45704d2..47601274abf7 100644
--- a/arch/openrisc/kernel/dma.c
+++ b/arch/openrisc/kernel/dma.c
@@ -208,20 +208,6 @@ or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
}
}
-static void
-or1k_sync_single_for_cpu(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction dir)
-{
- unsigned long cl;
- dma_addr_t addr = dma_handle;
- struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
-
- /* Invalidate the dcache for the requested range */
- for (cl = addr; cl < addr + size; cl += cpuinfo->dcache_block_size)
- mtspr(SPR_DCBIR, cl);
-}
-
static void
or1k_sync_single_for_device(struct device *dev,
dma_addr_t dma_handle, size_t size,
@@ -243,7 +229,6 @@ const struct dma_map_ops or1k_dma_map_ops = {
.unmap_page = or1k_unmap_page,
.map_sg = or1k_map_sg,
.unmap_sg = or1k_unmap_sg,
- .sync_single_for_cpu = or1k_sync_single_for_cpu,
.sync_single_for_device = or1k_sync_single_for_device,
};
EXPORT_SYMBOL(or1k_dma_map_ops);
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 1/4] openrisc: remove the sync_single_for_cpu DMA operation
Date: Thu, 19 Jul 2018 06:02:29 -0700 [thread overview]
Message-ID: <20180719130232.1819-2-hch@lst.de> (raw)
In-Reply-To: <20180719130232.1819-1-hch@lst.de>
openrisc does all the required cache maintainance at dma map time, and none
at unmap time. It thus has to implement sync_single_for_device to match
the map cace for buffer reuse, but there is no point in doing another
invalidation in the sync_single_cpu_case, which in terms of cache
maintainance is equivalent to the unmap case.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/openrisc/kernel/dma.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c
index ec7fd45704d2..47601274abf7 100644
--- a/arch/openrisc/kernel/dma.c
+++ b/arch/openrisc/kernel/dma.c
@@ -208,20 +208,6 @@ or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
}
}
-static void
-or1k_sync_single_for_cpu(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction dir)
-{
- unsigned long cl;
- dma_addr_t addr = dma_handle;
- struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
-
- /* Invalidate the dcache for the requested range */
- for (cl = addr; cl < addr + size; cl += cpuinfo->dcache_block_size)
- mtspr(SPR_DCBIR, cl);
-}
-
static void
or1k_sync_single_for_device(struct device *dev,
dma_addr_t dma_handle, size_t size,
@@ -243,7 +229,6 @@ const struct dma_map_ops or1k_dma_map_ops = {
.unmap_page = or1k_unmap_page,
.map_sg = or1k_map_sg,
.unmap_sg = or1k_unmap_sg,
- .sync_single_for_cpu = or1k_sync_single_for_cpu,
.sync_single_for_device = or1k_sync_single_for_device,
};
EXPORT_SYMBOL(or1k_dma_map_ops);
--
2.18.0
next prev parent reply other threads:[~2018-07-19 13:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-19 13:02 use the generic dma-noncoherent code for openrisc Christoph Hellwig
2018-07-19 13:02 ` [OpenRISC] " Christoph Hellwig
2018-07-19 13:02 ` Christoph Hellwig [this message]
2018-07-19 13:02 ` [OpenRISC] [PATCH 1/4] openrisc: remove the sync_single_for_cpu DMA operation Christoph Hellwig
2018-07-19 13:02 ` [PATCH 2/4] openrisc: remove the no-op unmap_page and unmap_sg DMA operations Christoph Hellwig
2018-07-19 13:02 ` [OpenRISC] " Christoph Hellwig
2018-07-19 13:02 ` [PATCH 3/4] openrisc: fix cache maintainance the the sync_single_for_device DMA operation Christoph Hellwig
2018-07-19 13:02 ` [OpenRISC] " Christoph Hellwig
2018-07-19 13:02 ` [PATCH 4/4] openrisc: use generic dma_noncoherent_ops Christoph Hellwig
2018-07-19 13:02 ` [OpenRISC] " Christoph Hellwig
2018-07-21 5:31 ` use the generic dma-noncoherent code for openrisc Stafford Horne
2018-07-21 5:31 ` [OpenRISC] " Stafford Horne
[not found] ` <20180721053142.GC9742-Uk7Bhu+bUQgm0WYXfsLZQReHL2rgt/dS@public.gmane.org>
2018-07-21 12:37 ` Christoph Hellwig
2018-07-21 12:37 ` Christoph Hellwig
2018-07-21 12:37 ` [OpenRISC] " Christoph Hellwig
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