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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH 1/5] arm: dts: aspeed: Add coprocessor interrupt controller
Date: Tue, 24 Jul 2018 14:24:02 +1000	[thread overview]
Message-ID: <20180724042406.15374-2-benh@kernel.crashing.org> (raw)
In-Reply-To: <20180724042406.15374-1-benh@kernel.crashing.org>

Add the missing node for the CVIC (the coprocessor interrupt
controller) and add a label to the SRAM node so it can be
referenced from the board device-tree file.

OpenBMC-Staging-Count: 1
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 8 +++++++-
 arch/arm/boot/dts/aspeed-g5.dtsi | 9 ++++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 75df1573380e..b1a19f99a4c9 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -92,6 +92,12 @@
 			reg = <0x1e6c0080 0x80>;
 		};
 
+		cvic: copro-interrupt-controller at 1e6c2000 {
+			compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
+			valid-sources = <0x7fffffff>;
+			reg = <0x1e6c2000 0x80>;
+		};
+
 		mac0: ethernet at 1e660000 {
 			compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
 			reg = <0x1e660000 0x180>;
@@ -161,7 +167,7 @@
 				status = "disabled";
 			};
 
-			sram at 1e720000 {
+			sram: sram at 1e720000 {
 				compatible = "mmio-sram";
 				reg = <0x1e720000 0x8000>;	// 32K
 			};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 17f2714d18a7..21141ca1bfa4 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -127,6 +127,13 @@
 			reg = <0x1e6c0080 0x80>;
 		};
 
+		cvic: copro-interrupt-controller at 1e6c2000 {
+			compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
+			valid-sources = <0xffffffff>;
+			copro-sw-interrupts = <1>;
+			reg = <0x1e6c2000 0x80>;
+		};
+
 		mac0: ethernet at 1e660000 {
 			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 			reg = <0x1e660000 0x180>;
@@ -211,7 +218,7 @@
 				status = "disabled";
 			};
 
-			sram at 1e720000 {
+			sram: sram at 1e720000 {
 				compatible = "mmio-sram";
 				reg = <0x1e720000 0x9000>;	// 36K
 			};
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: benh@kernel.crashing.org (Benjamin Herrenschmidt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/5] arm: dts: aspeed: Add coprocessor interrupt controller
Date: Tue, 24 Jul 2018 14:24:02 +1000	[thread overview]
Message-ID: <20180724042406.15374-2-benh@kernel.crashing.org> (raw)
In-Reply-To: <20180724042406.15374-1-benh@kernel.crashing.org>

Add the missing node for the CVIC (the coprocessor interrupt
controller) and add a label to the SRAM node so it can be
referenced from the board device-tree file.

OpenBMC-Staging-Count: 1
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 8 +++++++-
 arch/arm/boot/dts/aspeed-g5.dtsi | 9 ++++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 75df1573380e..b1a19f99a4c9 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -92,6 +92,12 @@
 			reg = <0x1e6c0080 0x80>;
 		};
 
+		cvic: copro-interrupt-controller at 1e6c2000 {
+			compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
+			valid-sources = <0x7fffffff>;
+			reg = <0x1e6c2000 0x80>;
+		};
+
 		mac0: ethernet at 1e660000 {
 			compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
 			reg = <0x1e660000 0x180>;
@@ -161,7 +167,7 @@
 				status = "disabled";
 			};
 
-			sram at 1e720000 {
+			sram: sram at 1e720000 {
 				compatible = "mmio-sram";
 				reg = <0x1e720000 0x8000>;	// 32K
 			};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 17f2714d18a7..21141ca1bfa4 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -127,6 +127,13 @@
 			reg = <0x1e6c0080 0x80>;
 		};
 
+		cvic: copro-interrupt-controller at 1e6c2000 {
+			compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
+			valid-sources = <0xffffffff>;
+			copro-sw-interrupts = <1>;
+			reg = <0x1e6c2000 0x80>;
+		};
+
 		mac0: ethernet at 1e660000 {
 			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 			reg = <0x1e660000 0x180>;
@@ -211,7 +218,7 @@
 				status = "disabled";
 			};
 
-			sram at 1e720000 {
+			sram: sram at 1e720000 {
 				compatible = "mmio-sram";
 				reg = <0x1e720000 0x9000>;	// 36K
 			};
-- 
2.17.1

  reply	other threads:[~2018-07-24  4:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-24  4:24 [PATCH 0/5] arm: dts: aspeed DTS updates for OpenPower Benjamin Herrenschmidt
2018-07-24  4:24 ` Benjamin Herrenschmidt
2018-07-24  4:24 ` Benjamin Herrenschmidt [this message]
2018-07-24  4:24   ` [PATCH 1/5] arm: dts: aspeed: Add coprocessor interrupt controller Benjamin Herrenschmidt
2018-07-24  4:29   ` Joel Stanley
2018-07-24  4:29     ` Joel Stanley
2018-07-24  4:36     ` Benjamin Herrenschmidt
2018-07-24  4:36       ` Benjamin Herrenschmidt
2018-07-24  4:24 ` [PATCH 2/5] arm: dts: OpenPower Romulus system can use coprocessor for FSI Benjamin Herrenschmidt
2018-07-24  4:24   ` Benjamin Herrenschmidt
2018-07-24  4:24 ` [PATCH 3/5] arm: dts: OpenPower Palmetto " Benjamin Herrenschmidt
2018-07-24  4:24   ` Benjamin Herrenschmidt
2018-08-24  0:43   ` Rob Herring
2018-08-24  0:43     ` Rob Herring
2018-07-24  4:24 ` [PATCH 4/5] arm: dts: Add power8 CFAM dtsi and use it on palmetto Benjamin Herrenschmidt
2018-07-24  4:24   ` Benjamin Herrenschmidt
2018-07-24  4:24 ` [PATCH 5/5] arm: dts: aspeed: Add power9 CFAM dtsi and use it on OpenPower P9 machines Benjamin Herrenschmidt
2018-07-24  4:24   ` Benjamin Herrenschmidt
2018-07-26 19:50   ` Olof Johansson
2018-07-26 19:50     ` Olof Johansson
2018-07-26 23:55     ` Benjamin Herrenschmidt
2018-07-26 23:55       ` Benjamin Herrenschmidt

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