From: hch@lst.de (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 4/6] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs
Date: Wed, 1 Aug 2018 09:13:07 +0200 [thread overview]
Message-ID: <20180801071307.GA20224@lst.de> (raw)
In-Reply-To: <20180731223714.GA12168@rob-hp-laptop>
On Tue, Jul 31, 2018 at 04:37:14PM -0600, Rob Herring wrote:
> On Wed, Jul 25, 2018 at 11:36:47AM +0200, Christoph Hellwig wrote:
> > From: Palmer Dabbelt <palmer@dabbelt.com>
> >
> > This patch adds documentation on the RISC-V local interrupt controller,
> > which is a per-hart interrupt controller that manages all interrupts
> > entering a RISC-V hart. This interrupt controller is present on all
> > RISC-V systems.
> >
> > Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
> > ---
> > .../interrupt-controller/riscv,cpu-intc.txt | 41 +++++++++++++++++++
> > 1 file changed, 41 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt
>
> My questions and comments on the prior version from Palmer remain.
Can you point to these questions please? I don't even rember when this
was last posted as it must have been a long time ago.
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Rob Herring <robh@kernel.org>
Cc: Christoph Hellwig <hch@lst.de>,
tglx@linutronix.de, palmer@sifive.com, jason@lakedaemon.net,
marc.zyngier@arm.com, mark.rutland@arm.com,
devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
shorne@gmail.com, Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH 4/6] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs
Date: Wed, 1 Aug 2018 09:13:07 +0200 [thread overview]
Message-ID: <20180801071307.GA20224@lst.de> (raw)
In-Reply-To: <20180731223714.GA12168@rob-hp-laptop>
On Tue, Jul 31, 2018 at 04:37:14PM -0600, Rob Herring wrote:
> On Wed, Jul 25, 2018 at 11:36:47AM +0200, Christoph Hellwig wrote:
> > From: Palmer Dabbelt <palmer@dabbelt.com>
> >
> > This patch adds documentation on the RISC-V local interrupt controller,
> > which is a per-hart interrupt controller that manages all interrupts
> > entering a RISC-V hart. This interrupt controller is present on all
> > RISC-V systems.
> >
> > Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
> > ---
> > .../interrupt-controller/riscv,cpu-intc.txt | 41 +++++++++++++++++++
> > 1 file changed, 41 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt
>
> My questions and comments on the prior version from Palmer remain.
Can you point to these questions please? I don't even rember when this
was last posted as it must have been a long time ago.
next prev parent reply other threads:[~2018-08-01 7:13 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-25 9:36 RISC-V irqchip drivers Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` [PATCH 1/6] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 21:44 ` Palmer Dabbelt
2018-07-25 21:44 ` Palmer Dabbelt
2018-07-26 8:10 ` Christoph Hellwig
2018-07-26 8:10 ` Christoph Hellwig
2018-07-25 9:36 ` [PATCH 2/6] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 21:44 ` Palmer Dabbelt
2018-07-25 21:44 ` Palmer Dabbelt
2018-07-25 9:36 ` [PATCH 3/6] irqchip: RISC-V Local Interrupt Controller Driver Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 11:18 ` Marc Zyngier
2018-07-25 11:18 ` Marc Zyngier
2018-07-25 11:24 ` Christoph Hellwig
2018-07-25 11:24 ` Christoph Hellwig
2018-07-25 11:37 ` Marc Zyngier
2018-07-25 11:37 ` Marc Zyngier
2018-07-25 17:54 ` Atish Patra
2018-07-25 17:54 ` Atish Patra
2018-07-26 3:38 ` Anup Patel
2018-07-26 3:38 ` Anup Patel
2018-07-26 8:27 ` Christoph Hellwig
2018-07-26 8:27 ` Christoph Hellwig
2018-07-26 13:39 ` Anup Patel
2018-07-26 13:39 ` Anup Patel
2018-08-01 18:55 ` Thomas Gleixner
2018-08-01 18:55 ` Thomas Gleixner
2018-08-02 7:34 ` Christoph Hellwig
2018-08-02 7:34 ` Christoph Hellwig
2018-08-02 9:35 ` Thomas Gleixner
2018-08-02 9:35 ` Thomas Gleixner
2018-08-02 9:43 ` Christoph Hellwig
2018-08-02 9:43 ` Christoph Hellwig
2018-08-02 9:44 ` Thomas Gleixner
2018-08-02 9:44 ` Thomas Gleixner
2018-08-04 4:03 ` Palmer Dabbelt
2018-08-04 4:03 ` Palmer Dabbelt
2018-08-04 16:40 ` Thomas Gleixner
2018-08-04 16:40 ` Thomas Gleixner
2018-07-25 9:36 ` [PATCH 4/6] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-31 22:37 ` Rob Herring
2018-07-31 22:37 ` Rob Herring
2018-08-01 7:13 ` Christoph Hellwig [this message]
2018-08-01 7:13 ` Christoph Hellwig
2018-08-01 18:14 ` Rob Herring
2018-08-01 18:14 ` Rob Herring
2018-07-25 9:36 ` [PATCH 5/6] irqchip: New RISC-V PLIC Driver Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` [PATCH 6/6] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-25 9:36 ` Christoph Hellwig
2018-07-31 22:46 ` Rob Herring
2018-07-31 22:46 ` Rob Herring
2018-08-01 7:16 ` Christoph Hellwig
2018-08-01 7:16 ` Christoph Hellwig
2018-08-01 18:26 ` Rob Herring
2018-08-01 18:26 ` Rob Herring
2018-08-02 9:55 ` Christoph Hellwig
2018-08-02 9:55 ` Christoph Hellwig
2018-08-02 14:43 ` Rob Herring
2018-08-02 14:43 ` Rob Herring
2018-08-04 1:48 ` Palmer Dabbelt
2018-08-04 1:48 ` Palmer Dabbelt
2018-07-25 21:26 ` RISC-V irqchip drivers Palmer Dabbelt
2018-07-25 21:26 ` Palmer Dabbelt
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