All of lore.kernel.org
 help / color / mirror / Atom feed
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings
Date: Mon, 20 Aug 2018 14:46:28 -0500	[thread overview]
Message-ID: <20180820194628.GA26783@bogus> (raw)
In-Reply-To: <1534447304-12919-2-git-send-email-jollys@xilinx.com>

On Thu, Aug 16, 2018 at 12:21:42PM -0700, Jolly Shah wrote:
> From: Rajan Vaja <rajan.vaja@xilinx.com>
> 
> Add documentation to describe ZynqMP power domain bindings.
> 
> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> Signed-off-by: Jolly Shah <jollys@xilinx.com>
> ---
>  .../firmware/xilinx/xlnx,zynqmp-firmware.txt       | 47 ++++++++++++++++++++++

This should be with all the other power domain bindings.

>  1 file changed, 47 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> index d215d15..5fa10a0 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> @@ -64,6 +64,29 @@ Output clocks are registered based on clock information received
>  from firmware. Output clocks indexes are mentioned in
>  include/dt-bindings/clock/xlnx,zynqmp-clk.h.
>  
> +-----------------------------------------------------------
> +Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
> +-----------------------------------------------------------
> +The binding for zynqmp-power-controller follow the common
> +generic PM domain binding[1].
> +
> +[1] Documentation/devicetree/bindings/power/power_domain.txt
> +
> +== Zynq MPSoC Generic PM Domain Node ==
> +
> +Required properties:
> + - compatible:	Must be: "xlnx,zynqmp-power-controller"
> +
> +This node contains a number of subnodes, each representing a single PM domain
> +that PM domain consumer devices reference.
> +
> +== PM Domain Nodes ==
> +
> +Required properties:
> + - #power-domain-cells:	Number of cells in a PM domain specifier. Must be 0.
> + - pd-id:		Domain identifier as defined by platform firmware.
> +			This identifier is passed to the PM firmware.

Make this a cell for the power domain consumer.

> +
>  -------
>  Example
>  -------
> @@ -78,5 +101,29 @@ firmware {
>  			clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
>  			clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
>  		};
> +		zynqmp-power-controller {
> +			compatible = "xlnx,zynqmp-power-controller";
> +
> +			pd_usb0: pd-usb0 {
> +				pd-id = <22>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_sata: pd-sata {
> +				pd-id = <28>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_gpu : pd-gpu {
> +				pd-id = <58 20 21>;
> +				#power-domain-cells = <0>;
> +			};
> +		};
>  	};
>  };
> +
> +sata0: ahci at SATA_AHCI_HBA {

Don't use defines in unit-addresses (or reg for that matter). It's 
pointless indirection.

> +	...
> +	power-domains = <&pd_sata>;
> +	...
> +};
> -- 
> 2.7.4
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Jolly Shah <jolly.shah@xilinx.com>
Cc: matthias.bgg@gmail.com, andy.gross@linaro.org,
	shawnguo@kernel.org, geert+renesas@glider.be,
	bjorn.andersson@linaro.org, sean.wang@mediatek.com,
	m.szyprowski@samsung.com, michal.simek@xilinx.com,
	mark.rutland@arm.com, rajanv@xilinx.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
	Jolly Shah <jollys@xilinx.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings
Date: Mon, 20 Aug 2018 14:46:28 -0500	[thread overview]
Message-ID: <20180820194628.GA26783@bogus> (raw)
In-Reply-To: <1534447304-12919-2-git-send-email-jollys@xilinx.com>

On Thu, Aug 16, 2018 at 12:21:42PM -0700, Jolly Shah wrote:
> From: Rajan Vaja <rajan.vaja@xilinx.com>
> 
> Add documentation to describe ZynqMP power domain bindings.
> 
> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> Signed-off-by: Jolly Shah <jollys@xilinx.com>
> ---
>  .../firmware/xilinx/xlnx,zynqmp-firmware.txt       | 47 ++++++++++++++++++++++

This should be with all the other power domain bindings.

>  1 file changed, 47 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> index d215d15..5fa10a0 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
> @@ -64,6 +64,29 @@ Output clocks are registered based on clock information received
>  from firmware. Output clocks indexes are mentioned in
>  include/dt-bindings/clock/xlnx,zynqmp-clk.h.
>  
> +-----------------------------------------------------------
> +Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
> +-----------------------------------------------------------
> +The binding for zynqmp-power-controller follow the common
> +generic PM domain binding[1].
> +
> +[1] Documentation/devicetree/bindings/power/power_domain.txt
> +
> +== Zynq MPSoC Generic PM Domain Node ==
> +
> +Required properties:
> + - compatible:	Must be: "xlnx,zynqmp-power-controller"
> +
> +This node contains a number of subnodes, each representing a single PM domain
> +that PM domain consumer devices reference.
> +
> +== PM Domain Nodes ==
> +
> +Required properties:
> + - #power-domain-cells:	Number of cells in a PM domain specifier. Must be 0.
> + - pd-id:		Domain identifier as defined by platform firmware.
> +			This identifier is passed to the PM firmware.

Make this a cell for the power domain consumer.

> +
>  -------
>  Example
>  -------
> @@ -78,5 +101,29 @@ firmware {
>  			clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
>  			clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
>  		};
> +		zynqmp-power-controller {
> +			compatible = "xlnx,zynqmp-power-controller";
> +
> +			pd_usb0: pd-usb0 {
> +				pd-id = <22>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_sata: pd-sata {
> +				pd-id = <28>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_gpu : pd-gpu {
> +				pd-id = <58 20 21>;
> +				#power-domain-cells = <0>;
> +			};
> +		};
>  	};
>  };
> +
> +sata0: ahci@SATA_AHCI_HBA {

Don't use defines in unit-addresses (or reg for that matter). It's 
pointless indirection.

> +	...
> +	power-domains = <&pd_sata>;
> +	...
> +};
> -- 
> 2.7.4
> 

  reply	other threads:[~2018-08-20 19:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-16 19:21 [PATCH v2 0/3] drivers: soc: xilinx: Add support for ZynqMP power domain driver Jolly Shah
2018-08-16 19:21 ` Jolly Shah
2018-08-16 19:21 ` Jolly Shah
2018-08-16 19:21 ` [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings Jolly Shah
2018-08-16 19:21   ` Jolly Shah
2018-08-16 19:21   ` Jolly Shah
2018-08-20 19:46   ` Rob Herring [this message]
2018-08-20 19:46     ` Rob Herring
2018-08-24 22:22     ` Jolly Shah
2018-08-24 22:22       ` Jolly Shah
2018-08-24 22:22       ` Jolly Shah
2018-09-13 17:51     ` Jolly Shah
2018-09-13 17:51       ` Jolly Shah
2018-09-13 17:51       ` Jolly Shah
2018-09-25 16:15       ` Rob Herring
2018-09-25 16:15         ` Rob Herring
2018-10-04 21:26         ` Jolly Shah
2018-10-04 21:26           ` Jolly Shah
2018-08-16 19:21 ` [PATCH v2 2/3] firmware: xilinx: Add APIs to control node status/power Jolly Shah
2018-08-16 19:21   ` Jolly Shah
2018-08-16 19:21   ` Jolly Shah
2018-08-16 19:21 ` [PATCH v2 3/3] drivers: soc: xilinx: Add ZynqMP power domain driver Jolly Shah
2018-08-16 19:21   ` Jolly Shah
2018-08-16 19:21   ` Jolly Shah

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180820194628.GA26783@bogus \
    --to=robh@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.