[Qemu-devel] [PATCH 0/2] tests/tcg/xtensa: exception vectors/handlers improvement

[Qemu-devel] [PATCH 0/2] tests/tcg/xtensa: exception vectors/handlers improvement

[Max Filippov]

Hello,

this series generalizes xtensa test vectors and linker script a bit further:
- it extracts exception/IRQ handlers from vectors, as not all core
  configurations have enough space between the vectors;
- it conditionalizes vectors code, so that only handlers for configured
  IRQs and exceptions are generated.

Max Filippov (2):
  tests/tcg/xtensa: move exception handlers to separate section
  tests/tcg/xtensa: only generate defined exception handlers

 tests/tcg/xtensa/linker.ld.S | 37 ++++++++++++++++++++++---------------
 tests/tcg/xtensa/vectors.S   | 16 ++++++++++++++++
 2 files changed, 38 insertions(+), 15 deletions(-)

-- 
2.11.0

[Qemu-devel] [PATCH 1/2] tests/tcg/xtensa: move exception handlers to separate section

[Max Filippov]

Not all CPU configurations may have enough space for handler code
between exception/interrupt vectors. Leave jumps to the handlers at the
vectors, but move all handlers past the vectors area.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 tests/tcg/xtensa/linker.ld.S | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

diff --git a/tests/tcg/xtensa/linker.ld.S b/tests/tcg/xtensa/linker.ld.S
index 5902302cf8fd..d0f33157ca9e 100644
--- a/tests/tcg/xtensa/linker.ld.S
+++ b/tests/tcg/xtensa/linker.ld.S
@@ -24,64 +24,71 @@ SECTIONS
 
     .vector :
     {
+#if XCHAL_HAVE_WINDOWED
     . = XCHAL_WINDOW_OF4_VECOFS;
         *(.vector.window_overflow_4)
-        *(.vector.window_overflow_4.*)
     . = XCHAL_WINDOW_UF4_VECOFS;
         *(.vector.window_underflow_4)
-        *(.vector.window_underflow_4.*)
     . = XCHAL_WINDOW_OF8_VECOFS;
         *(.vector.window_overflow_8)
-        *(.vector.window_overflow_8.*)
     . = XCHAL_WINDOW_UF8_VECOFS;
         *(.vector.window_underflow_8)
-        *(.vector.window_underflow_8.*)
     . = XCHAL_WINDOW_OF12_VECOFS;
         *(.vector.window_overflow_12)
-        *(.vector.window_overflow_12.*)
     . = XCHAL_WINDOW_UF12_VECOFS;
         *(.vector.window_underflow_12)
-        *(.vector.window_underflow_12.*)
-
+#endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
     . = XCHAL_INTLEVEL2_VECOFS;
         *(.vector.level2)
-        *(.vector.level2.*)
 #endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
     . = XCHAL_INTLEVEL3_VECOFS;
         *(.vector.level3)
-        *(.vector.level3.*)
 #endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
     . = XCHAL_INTLEVEL4_VECOFS;
         *(.vector.level4)
-        *(.vector.level4.*)
 #endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
     . = XCHAL_INTLEVEL5_VECOFS;
         *(.vector.level5)
-        *(.vector.level5.*)
 #endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
     . = XCHAL_INTLEVEL6_VECOFS;
         *(.vector.level6)
-        *(.vector.level6.*)
 #endif
 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
     . = XCHAL_INTLEVEL7_VECOFS;
         *(.vector.level7)
-        *(.vector.level7.*)
 #endif
 
     . = XCHAL_KERNEL_VECOFS;
         *(.vector.kernel)
-        *(.vector.kernel.*)
     . = XCHAL_USER_VECOFS;
         *(.vector.user)
-        *(.vector.user.*)
     . = XCHAL_DOUBLEEXC_VECOFS;
         *(.vector.double)
+    } > ram
+
+    .vector.text :
+    {
+        *(.vector.window_overflow_4.*)
+        *(.vector.window_underflow_4.*)
+        *(.vector.window_overflow_8.*)
+        *(.vector.window_underflow_8.*)
+        *(.vector.window_overflow_12.*)
+        *(.vector.window_underflow_12.*)
+
+        *(.vector.level2.*)
+        *(.vector.level3.*)
+        *(.vector.level4.*)
+        *(.vector.level5.*)
+        *(.vector.level6.*)
+        *(.vector.level7.*)
+
+        *(.vector.kernel.*)
+        *(.vector.user.*)
         *(.vector.double.*)
     } > ram
 
-- 
2.11.0

[Qemu-devel] [PATCH 2/2] tests/tcg/xtensa: only generate defined exception handlers

[Max Filippov]

Don't generate handlers for IRQ levels that are not defined for the CPU
or for window overflow/underflow exceptions for configs w/o windowed
registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 tests/tcg/xtensa/vectors.S | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/tests/tcg/xtensa/vectors.S b/tests/tcg/xtensa/vectors.S
index 265a1812399b..6a9cb3cde466 100644
--- a/tests/tcg/xtensa/vectors.S
+++ b/tests/tcg/xtensa/vectors.S
@@ -1,3 +1,5 @@
+#include "core-isa.h"
+
 .macro vector name
 
 .section .vector.\name
@@ -20,19 +22,33 @@ handler_\name\(): .word 0
 
 .endm
 
+#if XCHAL_HAVE_WINDOWED
 vector window_overflow_4
 vector window_overflow_8
 vector window_overflow_12
 vector window_underflow_4
 vector window_underflow_8
 vector window_underflow_12
+#endif
 
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
 vector level2
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
 vector level3
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
 vector level4
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
 vector level5
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
 vector level6
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
 vector level7
+#endif
 
 vector kernel
 vector user
-- 
2.11.0