From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible
Date: Tue, 4 Sep 2018 11:50:02 -0700 [thread overview]
Message-ID: <20180904185001.GA25119@infradead.org> (raw)
In-Reply-To: <20180904124514.6290-2-anup@brainfault.org>
On Tue, Sep 04, 2018 at 06:15:10PM +0530, Anup Patel wrote:
> The mechanism to trigger IPI is generally part of interrupt-controller
> driver for various architectures. On RISC-V, we have an option to trigger
> IPI using SBI or SOC vendor can implement RISC-V CPU where IPI will be
> triggered using SOC interrupt-controller (e.g. custom PLIC).
Which is exactly what we want to avoid, and should not make it easy.
The last thing we need is non-standard whacky IPI mechanisms, and
that is why we habe SBI calls for it. I think we should simply
stat that if an RISC-V cpu design bypasse the SBI for no good reason
we'll simply not support it.
So NAK for this patch.
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Anup Patel <anup@brainfault.org>
Cc: Palmer Dabbelt <palmer@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Atish Patra <atish.patra@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible
Date: Tue, 4 Sep 2018 11:50:02 -0700 [thread overview]
Message-ID: <20180904185001.GA25119@infradead.org> (raw)
In-Reply-To: <20180904124514.6290-2-anup@brainfault.org>
On Tue, Sep 04, 2018 at 06:15:10PM +0530, Anup Patel wrote:
> The mechanism to trigger IPI is generally part of interrupt-controller
> driver for various architectures. On RISC-V, we have an option to trigger
> IPI using SBI or SOC vendor can implement RISC-V CPU where IPI will be
> triggered using SOC interrupt-controller (e.g. custom PLIC).
Which is exactly what we want to avoid, and should not make it easy.
The last thing we need is non-standard whacky IPI mechanisms, and
that is why we habe SBI calls for it. I think we should simply
stat that if an RISC-V cpu design bypasse the SBI for no good reason
we'll simply not support it.
So NAK for this patch.
next prev parent reply other threads:[~2018-09-04 18:50 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-04 12:45 [RFC PATCH 0/5] New RISC-V Local Interrupt Controller Driver Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 12:45 ` [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 18:50 ` Christoph Hellwig [this message]
2018-09-04 18:50 ` Christoph Hellwig
2018-09-05 4:36 ` Anup Patel
2018-09-05 4:36 ` Anup Patel
2018-09-05 18:56 ` Christoph Hellwig
2018-09-05 18:56 ` Christoph Hellwig
2018-09-06 9:45 ` Palmer Dabbelt
2018-09-06 9:45 ` Palmer Dabbelt
2018-09-06 10:45 ` Anup Patel
2018-09-06 10:45 ` Anup Patel
2018-09-10 13:34 ` Christoph Hellwig
2018-09-10 13:34 ` Christoph Hellwig
2018-09-11 3:37 ` Anup Patel
2018-09-11 3:37 ` Anup Patel
2018-09-29 1:45 ` Palmer Dabbelt
2018-09-29 1:45 ` Palmer Dabbelt
2018-09-29 1:45 ` Palmer Dabbelt
2018-09-29 7:06 ` Anup Patel
2018-09-29 7:06 ` Anup Patel
2018-09-29 7:06 ` Anup Patel
2018-09-04 12:45 ` [RFC PATCH 2/5] RISC-V: No need to pass scause as arg to do_IRQ() Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 18:50 ` Christoph Hellwig
2018-09-04 18:50 ` Christoph Hellwig
2018-09-04 12:45 ` [RFC PATCH 3/5] RISC-V: Select useful GENERIC_IRQ kconfig options Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 18:56 ` Christoph Hellwig
2018-09-04 18:56 ` Christoph Hellwig
2018-09-05 4:52 ` Anup Patel
2018-09-05 4:52 ` Anup Patel
2018-09-05 18:57 ` Christoph Hellwig
2018-09-05 18:57 ` Christoph Hellwig
2018-09-04 12:45 ` [RFC PATCH 4/5] irqchip: RISC-V Local Interrupt Controller Driver Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 18:57 ` Christoph Hellwig
2018-09-04 18:57 ` Christoph Hellwig
2018-09-05 6:09 ` Anup Patel
2018-09-05 6:09 ` Anup Patel
2018-09-05 18:58 ` Christoph Hellwig
2018-09-05 18:58 ` Christoph Hellwig
2018-09-06 11:53 ` Anup Patel
2018-09-06 11:53 ` Anup Patel
2018-09-10 13:35 ` Christoph Hellwig
2018-09-10 13:35 ` Christoph Hellwig
2018-09-04 12:45 ` [RFC PATCH 5/5] clocksource: riscv_timer: Make timer interrupt as a per-CPU interrupt Anup Patel
2018-09-04 12:45 ` Anup Patel
2018-09-04 18:58 ` Christoph Hellwig
2018-09-04 18:58 ` Christoph Hellwig
2018-09-05 8:21 ` Anup Patel
2018-09-05 8:21 ` Anup Patel
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