All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org,
	Diego Viola <diego.viola@gmail.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms
Date: Wed, 5 Sep 2018 13:26:15 +0300	[thread overview]
Message-ID: <20180905102615.GN5565@intel.com> (raw)
In-Reply-To: <20180905100005.7663-1-imre.deak@intel.com>

On Wed, Sep 05, 2018 at 01:00:05PM +0300, Imre Deak wrote:
> During IPS disabling the current 42ms timeout value leads to occasional
> timeouts, increase it to 100ms which seems to get rid of the problem.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=107494
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107562
> Reported-by: Diego Viola <diego.viola@gmail.com>
> Tested-by: Diego Viola <diego.viola@gmail.com>
> Cc: Diego Viola <diego.viola@gmail.com>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a85a83f31979..1bd14c61dab5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5082,10 +5082,14 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
>  		mutex_lock(&dev_priv->pcu_lock);
>  		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
>  		mutex_unlock(&dev_priv->pcu_lock);
> -		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
> +		/*
> +		 * Wait for PCODE to finish disabling IPS. The BSpec specified
> +		 * 42ms timeout value leads to occasional timeouts so use 100ms
> +		 * instead.
> +		 */
>  		if (intel_wait_for_register(dev_priv,
>  					    IPS_CTL, IPS_ENABLE, 0,
> -					    42))
> +					    100))
>  			DRM_ERROR("Timed out waiting for IPS disable\n");
>  	} else {
>  		I915_WRITE(IPS_CTL, 0);
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org,
	Diego Viola <diego.viola@gmail.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms
Date: Wed, 5 Sep 2018 13:26:15 +0300	[thread overview]
Message-ID: <20180905102615.GN5565@intel.com> (raw)
In-Reply-To: <20180905100005.7663-1-imre.deak@intel.com>

On Wed, Sep 05, 2018 at 01:00:05PM +0300, Imre Deak wrote:
> During IPS disabling the current 42ms timeout value leads to occasional
> timeouts, increase it to 100ms which seems to get rid of the problem.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=107494
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107562
> Reported-by: Diego Viola <diego.viola@gmail.com>
> Tested-by: Diego Viola <diego.viola@gmail.com>
> Cc: Diego Viola <diego.viola@gmail.com>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a85a83f31979..1bd14c61dab5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5082,10 +5082,14 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
>  		mutex_lock(&dev_priv->pcu_lock);
>  		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
>  		mutex_unlock(&dev_priv->pcu_lock);
> -		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
> +		/*
> +		 * Wait for PCODE to finish disabling IPS. The BSpec specified
> +		 * 42ms timeout value leads to occasional timeouts so use 100ms
> +		 * instead.
> +		 */
>  		if (intel_wait_for_register(dev_priv,
>  					    IPS_CTL, IPS_ENABLE, 0,
> -					    42))
> +					    100))
>  			DRM_ERROR("Timed out waiting for IPS disable\n");
>  	} else {
>  		I915_WRITE(IPS_CTL, 0);
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrj�l�
Intel

  reply	other threads:[~2018-09-05 10:26 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-05 10:00 [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms Imre Deak
2018-09-05 10:26 ` Ville Syrjälä [this message]
2018-09-05 10:26   ` [Intel-gfx] " Ville Syrjälä
2018-09-05 10:50 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-09-05 12:44 ` ✓ Fi.CI.IGT: " Patchwork
2018-09-05 17:27   ` Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180905102615.GN5565@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=diego.viola@gmail.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.