[PATCH v1] drm/i915/chv: Update csc coefficient matrix during modeset

[PATCH v1] drm/i915/chv: Update csc coefficient matrix during modeset

[raviraj.p.sitaram]

From: P Raviraj Sitaram <raviraj.p.sitaram@intel.com>

During modeset, previously configured csc coefficient matrix,if any, will
not persist. This can result in blank screen as csc mode will be programmed
while loading LUT but csc coefficient matrix remains unprogrammed.

Changes since V1:
- Removed platform check

Signed-off-by: P Raviraj Sitaram <raviraj.p.sitaram@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b2bab57cd113..2b77d9350a3a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6014,6 +6014,8 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	i9xx_set_pipeconf(intel_crtc);
 
+	intel_color_set_csc(&pipe_config->base);
+
 	intel_crtc->active = true;
 
 	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
-- 
2.7.4

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✓ Fi.CI.BAT: success for drm/i915/chv: Update csc coefficient matrix during modeset (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/chv: Update csc coefficient matrix during modeset (rev2)
URL   : https://patchwork.freedesktop.org/series/49430/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4792 -> Patchwork_10136 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/49430/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10136 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_guc:
      fi-cfl-guc:         PASS -> DMESG-WARN (fdo#107258)

    igt@gem_exec_suspend@basic-s4-devices:
      fi-blb-e6850:       NOTRUN -> INCOMPLETE (fdo#107718)

    igt@kms_psr@primary_page_flip:
      fi-cnl-psr:         PASS -> FAIL (fdo#107336)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_hangcheck:
      fi-skl-guc:         FAIL (fdo#107837) -> PASS

    igt@gem_exec_suspend@basic-s3:
      fi-blb-e6850:       INCOMPLETE (fdo#107718) -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258
  fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107837 https://bugs.freedesktop.org/show_bug.cgi?id=107837


== Participating hosts (52 -> 47) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4792 -> Patchwork_10136

  CI_DRM_4792: e1d007eb6fbfa346237b7b3a62625e50b3070c71 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4637: 57e3d826dee154cb8664667db7660d854a707fc6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10136: b424875cce453b5ed6f689942cd123b080c190c7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b424875cce45 drm/i915/chv: Update csc coefficient matrix during modeset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10136/issues.html
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✓ Fi.CI.IGT: success for drm/i915/chv: Update csc coefficient matrix during modeset (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/chv: Update csc coefficient matrix during modeset (rev2)
URL   : https://patchwork.freedesktop.org/series/49430/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4792_full -> Patchwork_10136_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10136_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_ctx_isolation@bcs0-s3:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    igt@kms_setmode@basic:
      shard-apl:          PASS -> FAIL (fdo#99912)
      shard-kbl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@gem_exec_flush@basic-uc-pro-default:
      shard-snb:          INCOMPLETE (fdo#105411) -> PASS

    igt@perf@blocking:
      shard-hsw:          FAIL -> PASS

    
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4792 -> Patchwork_10136

  CI_DRM_4792: e1d007eb6fbfa346237b7b3a62625e50b3070c71 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4637: 57e3d826dee154cb8664667db7660d854a707fc6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10136: b424875cce453b5ed6f689942cd123b080c190c7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10136/shards.html
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Re: [PATCH v1] drm/i915/chv: Update csc coefficient matrix during modeset

[Ville Syrjälä]

On Mon, Sep 10, 2018 at 07:57:14PM +0530, raviraj.p.sitaram@intel.com wrote:
> From: P Raviraj Sitaram <raviraj.p.sitaram@intel.com>
> 
> During modeset, previously configured csc coefficient matrix,if any, will
> not persist. This can result in blank screen as csc mode will be programmed
> while loading LUT but csc coefficient matrix remains unprogrammed.
> 
> Changes since V1:
> - Removed platform check
> 
> Signed-off-by: P Raviraj Sitaram <raviraj.p.sitaram@intel.com>

Thanks for the patch. Pushed to dinq.

> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b2bab57cd113..2b77d9350a3a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6014,6 +6014,8 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	i9xx_set_pipeconf(intel_crtc);
>  
> +	intel_color_set_csc(&pipe_config->base);
> +
>  	intel_crtc->active = true;
>  
>  	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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