All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Introduce BITS_PER_TYPE
Date: Wed, 26 Sep 2018 13:59:12 +0300	[thread overview]
Message-ID: <20180926105912.GS9144@intel.com> (raw)
In-Reply-To: <20180926104707.17410-1-chris@chris-wilson.co.uk>

On Wed, Sep 26, 2018 at 11:47:07AM +0100, Chris Wilson wrote:
> Borrow the idea from net_dim.h to simplify the common determination of
> how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.c          | 4 ++--
>  drivers/gpu/drm/i915/i915_gem.c          | 2 +-
>  drivers/gpu/drm/i915/i915_query.c        | 2 +-
>  drivers/gpu/drm/i915/i915_syncmap.c      | 2 +-
>  drivers/gpu/drm/i915/i915_utils.h        | 2 +-
>  drivers/gpu/drm/i915/intel_device_info.c | 3 +--
>  drivers/gpu/drm/i915/intel_engine_cs.c   | 2 +-
>  7 files changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 44e2c0f5ec50..ade9bca250fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1649,8 +1649,8 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
>  	device_info->device_id = pdev->device;
>  
>  	BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> -		     sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> -	BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> +		     BITS_PER_TYPE(device_info->platform_mask));
> +	BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
>  
>  	return i915;
>  }
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index db9688d14912..717f4321e987 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5959,7 +5959,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
>  	 * the bits.
>  	 */
>  	BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
> -		     sizeof(atomic_t) * BITS_PER_BYTE);
> +		     BITS_PER_TYPE(atomic_t));
>  
>  	if (old) {
>  		WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 3f502eef2431..5821002cad42 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
>  	slice_length = sizeof(sseu->slice_mask);
>  	subslice_length = sseu->max_slices *
>  		DIV_ROUND_UP(sseu->max_subslices,
> -			     sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
> +			     BITS_PER_TYPE(sseu->subslice_mask[0]));
>  	eu_length = sseu->max_slices * sseu->max_subslices *
>  		DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>  
> diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
> index 58f8d0cc125c..60404dbb2e9f 100644
> --- a/drivers/gpu/drm/i915/i915_syncmap.c
> +++ b/drivers/gpu/drm/i915/i915_syncmap.c
> @@ -92,7 +92,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
>  {
>  	BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
>  	BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
> -	BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
> +	BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
>  	*root = NULL;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index 395dd2511568..5858a43e19da 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -68,7 +68,7 @@
>  
>  /* Note we don't consider signbits :| */
>  #define overflows_type(x, T) \
> -	(sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
> +	(sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
>  
>  #define ptr_mask_bits(ptr, n) ({					\
>  	unsigned long __v = (unsigned long)(ptr);			\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 0ef0c6448d53..31f6be774833 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
>  		info->num_scalers[PIPE_C] = 1;
>  	}
>  
> -	BUILD_BUG_ON(I915_NUM_ENGINES >
> -		     sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
> +	BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
>  
>  	/*
>  	 * Skylake and Broxton currently don't expose the topmost plane as its
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 217ed3ee1cab..6726d57f018f 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -335,7 +335,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
>  
>  	WARN_ON(ring_mask == 0);
>  	WARN_ON(ring_mask &
> -		GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
> +		GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
>  
>  	for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
>  		if (!HAS_ENGINE(dev_priv, i))
> -- 
> 2.19.0

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-09-26 11:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-09-26 10:58 ` Jani Nikula
2018-09-26 10:59 ` Ville Syrjälä [this message]
2018-09-26 11:02 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE (rev2) Patchwork
2018-09-26 11:39 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-26 13:16 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-07-06  8:44 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-07-06  8:59 ` Tvrtko Ursulin
2018-07-06  9:07 ` Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180926105912.GS9144@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.