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From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Cc: linux-mtd@lists.infradead.org, marek.vasut@gmail.com,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	robh@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org,
	linux-arm-kernel@lists.infradead.org,
	computersforpeace@gmail.com, frieder.schrempf@exceet.de,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/5] spi: spi-mem: Add driver for NXP FlexSPI controller
Date: Mon, 8 Oct 2018 21:10:53 +0200	[thread overview]
Message-ID: <20181008211053.71171cff@bbrezillon> (raw)
In-Reply-To: <1538997103-11152-2-git-send-email-yogeshnarayan.gaur@nxp.com>

On Mon,  8 Oct 2018 16:41:39 +0530
Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> +/* Registers used by the driver */
> +#define FSPI_MCR0			0x00
> +#define FSPI_MCR0_AHB_TIMEOUT_MASK	GENMASK(31, 24)
> +#define FSPI_MCR0_IP_TIMEOUT_MASK	GENMASK(23, 16)

You never mask the IP_TIMEOUT val, so you don't need a _MASK macro
here. Just define

#define FSPI_MCR0_IP_TIMEOUT(x)		((x) < 16)

The same goes for any field that you don't need to mask.

The only case you might need a mask def is when you have the following
pattern:

	val = readl(reg);
	val &= ~XXXX_MASK;
	val |= XXXX(new_field_val);
	writel(val, reg);

> +#define FSPI_MCR0_LEARN_EN_MASK		BIT(15)
> +#define FSPI_MCR0_SCRFRUN_EN_MASK	BIT(14)
> +#define FSPI_MCR0_OCTCOMB_EN_MASK	BIT(13)

Drop the _MASK suffix for any single-bit field:

#define FSPI_MCR0_OCTCOMB_EN		BIT(13)

WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@bootlin.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/5] spi: spi-mem: Add driver for NXP FlexSPI controller
Date: Mon, 8 Oct 2018 21:10:53 +0200	[thread overview]
Message-ID: <20181008211053.71171cff@bbrezillon> (raw)
In-Reply-To: <1538997103-11152-2-git-send-email-yogeshnarayan.gaur@nxp.com>

On Mon,  8 Oct 2018 16:41:39 +0530
Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> +/* Registers used by the driver */
> +#define FSPI_MCR0			0x00
> +#define FSPI_MCR0_AHB_TIMEOUT_MASK	GENMASK(31, 24)
> +#define FSPI_MCR0_IP_TIMEOUT_MASK	GENMASK(23, 16)

You never mask the IP_TIMEOUT val, so you don't need a _MASK macro
here. Just define

#define FSPI_MCR0_IP_TIMEOUT(x)		((x) < 16)

The same goes for any field that you don't need to mask.

The only case you might need a mask def is when you have the following
pattern:

	val = readl(reg);
	val &= ~XXXX_MASK;
	val |= XXXX(new_field_val);
	writel(val, reg);

> +#define FSPI_MCR0_LEARN_EN_MASK		BIT(15)
> +#define FSPI_MCR0_SCRFRUN_EN_MASK	BIT(14)
> +#define FSPI_MCR0_OCTCOMB_EN_MASK	BIT(13)

Drop the _MASK suffix for any single-bit field:

#define FSPI_MCR0_OCTCOMB_EN		BIT(13)

  reply	other threads:[~2018-10-08 19:10 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-08 11:11 [PATCH v4 0/5] spi: spi-mem: Add driver for NXP FlexSPI controller Yogesh Gaur
2018-10-08 11:11 ` Yogesh Gaur
2018-10-08 11:11 ` [PATCH v4 1/5] " Yogesh Gaur
2018-10-08 11:11   ` Yogesh Gaur
2018-10-08 19:10   ` Boris Brezillon [this message]
2018-10-08 19:10     ` Boris Brezillon
2018-10-08 11:11 ` [PATCH v4 2/5] dt-bindings: spi: add binding file " Yogesh Gaur
2018-10-08 11:11   ` Yogesh Gaur
2018-10-09  0:25   ` Shawn Guo
2018-10-09  0:25     ` Shawn Guo
2018-10-08 11:11 ` [PATCH v4 3/5] arm64: dts: lx2160a: add FlexSPI node property Yogesh Gaur
2018-10-08 11:11   ` Yogesh Gaur
2018-10-08 11:11 ` [PATCH v4 4/5] arm64: defconfig: enable NXP FlexSPI driver Yogesh Gaur
2018-10-08 11:11   ` Yogesh Gaur
2018-10-08 11:11 ` [PATCH v4 5/5] MAINTAINERS: add maintainers for the " Yogesh Gaur
2018-10-08 11:11   ` Yogesh Gaur
  -- strict thread matches above, loose matches on Subject: below --
2018-10-11 11:00 [PATCH v4 0/5] spi: spi-mem: Add driver for NXP FlexSPI controller Yogesh Narayan Gaur
2018-10-11 11:00 ` [PATCH v4 1/5] " Yogesh Narayan Gaur
2018-10-11 11:00   ` Yogesh Narayan Gaur

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