* [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
@ 2018-11-15 19:48 clinton.a.taylor
2018-11-15 20:07 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: clinton.a.taylor @ 2018-11-15 19:48 UTC (permalink / raw)
To: Intel-gfx
From: Clint Taylor <clinton.a.taylor@intel.com>
The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during
driver init. Use this value instead of reading the register again as the
power well for PORTA RCOMP register may not be enabled and will return
0xFFFFFFFF instead of the computed value.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
index 3c7f10d..7cee57f 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
* the corresponding calibrated value from PHY1, and disable
* the automatic calibration on PHY0.
*/
- val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
- phy_info->rcomp_phy);
+ if (!dev_priv->bxt_phy_grc)
+ val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
+ phy_info->rcomp_phy);
+ else
+ val = dev_priv->bxt_phy_grc;
+
grc_code = val << GRC_CODE_FAST_SHIFT |
val << GRC_CODE_SLOW_SHIFT |
val;
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
@ 2018-11-15 20:07 ` Patchwork
2018-11-15 20:28 ` ✓ Fi.CI.BAT: success " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-11-15 20:07 UTC (permalink / raw)
To: clinton.a.taylor; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL : https://patchwork.freedesktop.org/series/52559/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e9cbd5053fbd drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
-:29: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#29: FILE: drivers/gpu/drm/i915/intel_dpio_phy.c:426:
+ val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
total: 0 errors, 0 warnings, 1 checks, 14 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
2018-11-15 20:07 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2018-11-15 20:28 ` Patchwork
2018-11-15 21:19 ` [PATCH] " Atwood, Matthew S
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-11-15 20:28 UTC (permalink / raw)
To: clinton.a.taylor; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL : https://patchwork.freedesktop.org/series/52559/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10831 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/52559/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10831 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_coherency:
fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)
igt@gem_ctx_create@basic-files:
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@gem_exec_suspend@basic-s4-devices:
fi-bsw-n3050: PASS -> INCOMPLETE (fdo#105876)
igt@kms_chamelium@common-hpd-after-suspend:
fi-skl-6700k2: PASS -> WARN (fdo#108680)
==== Possible fixes ====
igt@gem_ctx_create@basic-files:
fi-bsw-kefka: FAIL (fdo#108656) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +2
igt@pm_rpm@module-reload:
fi-skl-6770hq: DMESG-WARN (fdo#105541) -> PASS
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
fdo#105876 https://bugs.freedesktop.org/show_bug.cgi?id=105876
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680
== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_5147 -> Patchwork_10831
CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10831: e9cbd5053fbdb5ba186961a644ddc9843a04e245 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e9cbd5053fbd drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10831/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
2018-11-15 20:07 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-11-15 20:28 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-11-15 21:19 ` Atwood, Matthew S
2018-11-15 22:16 ` ✓ Fi.CI.IGT: success for " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Atwood, Matthew S @ 2018-11-15 21:19 UTC (permalink / raw)
To: Intel-gfx@lists.freedesktop.org, Taylor, Clinton A
On Thu, 2018-11-15 at 11:48 -0800, clinton.a.taylor@intel.com wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
>
> The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv
> during
> driver init. Use this value instead of reading the register again as
> the
> power well for PORTA RCOMP register may not be enabled and will
> return
> 0xFFFFFFFF instead of the computed value.
>
Tested-by: Matt Atwood <matthew.s.atwood@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c
> b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index 3c7f10d..7cee57f 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct
> drm_i915_private *dev_priv,
> * the corresponding calibrated value from PHY1, and
> disable
> * the automatic calibration on PHY0.
> */
> - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> - phy_info-
> >rcomp_phy);
> + if (!dev_priv->bxt_phy_grc)
> + val = dev_priv->bxt_phy_grc =
> bxt_get_grc(dev_priv,
> + phy_i
> nfo->rcomp_phy);
> + else
> + val = dev_priv->bxt_phy_grc;
> +
> grc_code = val << GRC_CODE_FAST_SHIFT |
> val << GRC_CODE_SLOW_SHIFT |
> val;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
` (2 preceding siblings ...)
2018-11-15 21:19 ` [PATCH] " Atwood, Matthew S
@ 2018-11-15 22:16 ` Patchwork
2018-11-16 19:29 ` [PATCH] " Imre Deak
2018-11-16 19:36 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-11-15 22:16 UTC (permalink / raw)
To: clinton.a.taylor; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL : https://patchwork.freedesktop.org/series/52559/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5147_full -> Patchwork_10831_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10831_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10831_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10831_full:
=== IGT changes ===
==== Warnings ====
igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite:
shard-hsw: PASS -> SKIP
igt@tools_test@tools_test:
shard-glk: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10831_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_suspend@shrink:
shard-skl: NOTRUN -> INCOMPLETE (fdo#106886)
igt@gem_ppgtt@blt-vs-render-ctx0:
shard-skl: PASS -> TIMEOUT (fdo#108039)
igt@gem_userptr_blits@readonly-unsync:
shard-skl: PASS -> INCOMPLETE (fdo#108074)
igt@kms_atomic_transition@1x-modeset-transitions-fencing:
shard-skl: PASS -> FAIL (fdo#107815, fdo#108470)
igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge:
shard-skl: PASS -> FAIL (fdo#104671)
igt@kms_color@pipe-a-legacy-gamma:
shard-kbl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +2
igt@kms_color@pipe-b-legacy-gamma:
shard-apl: PASS -> FAIL (fdo#104782)
igt@kms_cursor_crc@cursor-256x256-random:
shard-skl: PASS -> FAIL (fdo#103232)
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_cursor_crc@cursor-64x21-sliding:
shard-apl: PASS -> FAIL (fdo#103232) +3
igt@kms_cursor_crc@cursor-64x64-offscreen:
shard-skl: NOTRUN -> FAIL (fdo#103232)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
shard-skl: NOTRUN -> FAIL (fdo#105683)
igt@kms_plane@pixel-format-pipe-b-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
igt@kms_plane@pixel-format-pipe-c-planes:
shard-apl: PASS -> FAIL (fdo#103166)
igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#107815)
igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
shard-skl: NOTRUN -> FAIL (fdo#108145)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
igt@perf_pmu@invalid-init:
shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763) +1
igt@pm_rpm@system-suspend-devices:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
==== Possible fixes ====
igt@gem_exec_nop@basic-series:
shard-apl: INCOMPLETE (fdo#103927) -> PASS
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: TIMEOUT (fdo#108039) -> PASS
igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
shard-apl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +3
igt@kms_color@pipe-b-degamma:
shard-apl: FAIL (fdo#104782) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS
igt@kms_cursor_crc@cursor-256x256-dpms:
shard-apl: FAIL (fdo#103232) -> PASS +3
igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
shard-skl: FAIL (fdo#103184) -> PASS
igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
shard-skl: FAIL (fdo#103232, fdo#103184) -> PASS
igt@kms_fbcon_fbt@fbc-suspend:
shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: FAIL (fdo#105363) -> PASS
shard-glk: FAIL (fdo#102887, fdo#105363) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-farfromfence:
shard-skl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
shard-skl: FAIL (fdo#105682) -> PASS
igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
shard-skl: FAIL (fdo#108145, fdo#107815) -> PASS
igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
shard-skl: FAIL (fdo#107815) -> PASS
igt@kms_setmode@basic:
shard-hsw: FAIL (fdo#99912) -> PASS
igt@kms_vblank@pipe-c-ts-continuation-suspend:
shard-hsw: FAIL (fdo#104894) -> PASS
igt@pm_rpm@basic-rte:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
igt@pm_rpm@gem-execbuf-stress:
shard-skl: INCOMPLETE (fdo#107807, fdo#107803) -> PASS
igt@pm_rpm@system-suspend-modeset:
shard-skl: INCOMPLETE (fdo#104108, fdo#107807) -> PASS
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682
fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885
fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
fdo#107803 https://bugs.freedesktop.org/show_bug.cgi?id=107803
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
fdo#108470 https://bugs.freedesktop.org/show_bug.cgi?id=108470
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (7 -> 6) ==
Missing (1): shard-iclb
== Build changes ==
* Linux: CI_DRM_5147 -> Patchwork_10831
CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10831: e9cbd5053fbdb5ba186961a644ddc9843a04e245 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10831/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
` (3 preceding siblings ...)
2018-11-15 22:16 ` ✓ Fi.CI.IGT: success for " Patchwork
@ 2018-11-16 19:29 ` Imre Deak
2018-11-16 19:36 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: Imre Deak @ 2018-11-16 19:29 UTC (permalink / raw)
To: clinton.a.taylor; +Cc: Intel-gfx
On Thu, Nov 15, 2018 at 11:48:06AM -0800, clinton.a.taylor@intel.com wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
>
> The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during
> driver init. Use this value instead of reading the register again as the
> power well for PORTA RCOMP register may not be enabled and will return
> 0xFFFFFFFF instead of the computed value.
PORT_REF_DW6 for both the port A and the port B/C PHYs are in power well
#0, which is always on whenever we are runtime resumed (which is always
the case during _bxt_ddi_phy_init). Also the PHY for port A always gets
enabled before we read out the comp value.
What are the other port A PHY registers in the above case?
Could it be that the port A PHY power gating in PORT_CL1CM_DW28 causes
this?
Not sure how good it is to reuse the same comp value across multiple
off/on cycles, it could change in theory. There could also be some other
issue with the port A PHY init.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index 3c7f10d..7cee57f 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
> * the corresponding calibrated value from PHY1, and disable
> * the automatic calibration on PHY0.
> */
> - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> - phy_info->rcomp_phy);
> + if (!dev_priv->bxt_phy_grc)
> + val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> + phy_info->rcomp_phy);
> + else
> + val = dev_priv->bxt_phy_grc;
> +
> grc_code = val << GRC_CODE_FAST_SHIFT |
> val << GRC_CODE_SLOW_SHIFT |
> val;
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
` (4 preceding siblings ...)
2018-11-16 19:29 ` [PATCH] " Imre Deak
@ 2018-11-16 19:36 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2018-11-16 19:36 UTC (permalink / raw)
To: clinton.a.taylor; +Cc: Intel-gfx
On Thu, Nov 15, 2018 at 11:48:06AM -0800, clinton.a.taylor@intel.com wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
>
> The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during
> driver init. Use this value instead of reading the register again as the
> power well for PORTA RCOMP register may not be enabled and will return
> 0xFFFFFFFF instead of the computed value.
I have the feeling this is not the right fix for the issue.
The function where this is stored is the same function this patch is
changing. just a little bit earlier. So if power well is not enabled
now it was probably not enabled a few cycles earlier.
Also if it is just a matter of power well it is just to make sure
that we make sure to grab the right power domain and relase when
this is not needed.
Thanks,
Rodrigo.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index 3c7f10d..7cee57f 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
> * the corresponding calibrated value from PHY1, and disable
> * the automatic calibration on PHY0.
> */
> - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> - phy_info->rcomp_phy);
> + if (!dev_priv->bxt_phy_grc)
> + val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> + phy_info->rcomp_phy);
> + else
> + val = dev_priv->bxt_phy_grc;
> +
> grc_code = val << GRC_CODE_FAST_SHIFT |
> val << GRC_CODE_SLOW_SHIFT |
> val;
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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-- links below jump to the message on this page --
2018-11-15 19:48 [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy clinton.a.taylor
2018-11-15 20:07 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-11-15 20:28 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-15 21:19 ` [PATCH] " Atwood, Matthew S
2018-11-15 22:16 ` ✓ Fi.CI.IGT: success for " Patchwork
2018-11-16 19:29 ` [PATCH] " Imre Deak
2018-11-16 19:36 ` Rodrigo Vivi
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