From: Andrew Lunn <andrew@lunn.ch>
To: Biao Huang <biao.huang@mediatek.com>
Cc: davem@davemloft.net, robh+dt@kernel.org,
honghui.zhang@mediatek.com, yt.shen@mediatek.com,
liguo.zhang@mediatek.com, mark.rutland@arm.com,
nelson.chang@mediatek.com, matthias.bgg@gmail.com,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, joabreu@synopsys.com
Subject: Re: [v4, PATCH 2/2] dt-binding: mediatek-dwmac: add binding document for MediaTek MT2712 DWMAC
Date: Tue, 20 Nov 2018 15:49:05 +0100 [thread overview]
Message-ID: <20181120144905.GD18335@lunn.ch> (raw)
In-Reply-To: <1542705696-18507-3-git-send-email-biao.huang@mediatek.com>
> +Optional properties:
> +- mediatek,tx-delay: TX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-rxid/mii interface.
> +- mediatek,rx-delay: RX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-txid/mii/rmii interface.
> +- mediatek,fine-tune: boolean property, if present indicates that fine delay
> + is selected for rgmii interface.
> + If present, tx-delay/rx-delay is 170+/-50ps per stage.
> + Else tx-delay/rx-delay of coarse delay macro is 0.55+/-0.2ns per stage.
> + This property do not apply to non-rgmii PHYs.
> + Only coarse-tune delay is supported for mii/rmii PHYs.
Didn't Rob say to express the delay in pS, and have the driver convert
that to values to put into registers. That is what i would prefer.
Andrew
WARNING: multiple messages have this Message-ID (diff)
From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: [v4, PATCH 2/2] dt-binding: mediatek-dwmac: add binding document for MediaTek MT2712 DWMAC
Date: Tue, 20 Nov 2018 15:49:05 +0100 [thread overview]
Message-ID: <20181120144905.GD18335@lunn.ch> (raw)
In-Reply-To: <1542705696-18507-3-git-send-email-biao.huang@mediatek.com>
> +Optional properties:
> +- mediatek,tx-delay: TX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-rxid/mii interface.
> +- mediatek,rx-delay: RX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-txid/mii/rmii interface.
> +- mediatek,fine-tune: boolean property, if present indicates that fine delay
> + is selected for rgmii interface.
> + If present, tx-delay/rx-delay is 170+/-50ps per stage.
> + Else tx-delay/rx-delay of coarse delay macro is 0.55+/-0.2ns per stage.
> + This property do not apply to non-rgmii PHYs.
> + Only coarse-tune delay is supported for mii/rmii PHYs.
Didn't Rob say to express the delay in pS, and have the driver convert
that to values to put into registers. That is what i would prefer.
Andrew
next prev parent reply other threads:[~2018-11-20 14:49 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-20 9:21 [v4, PATCH 0/2] add Ethernet driver support for mt2712 Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 9:21 ` [v4, PATCH 1/2] net:stmmac: dwmac-mediatek: add " Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 9:21 ` [v4, PATCH 2/2] dt-binding: mediatek-dwmac: add binding document for MediaTek MT2712 DWMAC Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 9:21 ` Biao Huang
2018-11-20 14:49 ` Andrew Lunn [this message]
2018-11-20 14:49 ` Andrew Lunn
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