[PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Niklas Söderlund]

Hi,

Recent datasheet updates have made it clear that some quirks are not SoC
specific but SoC + ES version specific. Currently the quirks are
selected using compatibility values but whit this new information that
is not enough.

Patch 1/3 adds support to select quirks based on SoC + ES revision using
soc_device_match() and converts the only existing quirk. Patch 2/3
Removes the old method to select quirk based on compatibility string.
While Patch 3/3 adds a new quirk from the BSP which blacklists some
known problematic ES versions for HS400. HS400 is not yet enabled
upstream so blacklisting these ES versions is not a regression of
functionality.

Based on mmc/next and tested on H3 and M3-N.

Niklas Söderlund (3):
  mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision
  mmc: renesas_sdhi: align compatibility properties for H3 and M3-W
  mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012]

 drivers/mmc/host/renesas_sdhi_core.c          | 36 +++++++++++++++++++
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 20 ++---------
 drivers/mmc/host/renesas_sdhi_sys_dmac.c      | 20 ++---------
 3 files changed, 41 insertions(+), 35 deletions(-)

-- 
2.19.1

[PATCH v3 1/3] mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision

[Niklas Söderlund]

Latest datasheet makes it clear that not all ES revisions of the H3 and
M3-W have the 4-tap HS400 mode quirk, currently the quirk is set
unconditionally for these two SoCs. Prepare to handle the quirk based on
SoC revision instead of compatibility value by using soc_device_match()
and set the TMIO_MMC_HAVE_4TAP_HS400 flag explicitly.

The reason for adding a new quirks struct instead of just a flag is that
looking ahead it seems more quirks needs to be handled in a SoC revision
basis.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
* Changes since v2
- Renamed sdhi_quirks_h3_m3w to sdhi_quirks_4tap. This have little
  effect as the last patch in this series renames the variable once more
  once more quirks are added which are more SoC specific. Suggested by
  Geert, thanks.
---
 drivers/mmc/host/renesas_sdhi_core.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 78bd117bbe65de46..f20df18f49e0d7c5 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -32,6 +32,7 @@
 #include <linux/pinctrl/consumer.h>
 #include <linux/pinctrl/pinctrl-state.h>
 #include <linux/regulator/consumer.h>
+#include <linux/sys_soc.h>
 
 #include "renesas_sdhi.h"
 #include "tmio_mmc.h"
@@ -45,6 +46,10 @@
 #define SDHI_VER_GEN3_SD	0xcc10
 #define SDHI_VER_GEN3_SDMMC	0xcd10
 
+struct renesas_sdhi_quirks {
+	bool hs400_4taps;
+};
+
 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
 {
 	u32 val;
@@ -593,11 +598,25 @@ static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
 	renesas_sdhi_sdbuf_width(host, enable ? width : 16);
 }
 
+static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
+	.hs400_4taps = true,
+};
+
+static const struct soc_device_attribute sdhi_quirks_match[]  = {
+	{ .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_4tap },
+	{ .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_4tap },
+	{ .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_4tap },
+	{ .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_4tap },
+	{ /* Sentinel. */ },
+};
+
 int renesas_sdhi_probe(struct platform_device *pdev,
 		       const struct tmio_mmc_dma_ops *dma_ops)
 {
 	struct tmio_mmc_data *mmd = pdev->dev.platform_data;
+	const struct renesas_sdhi_quirks *quirks = NULL;
 	const struct renesas_sdhi_of_data *of_data;
+	const struct soc_device_attribute *attr;
 	struct tmio_mmc_data *mmc_data;
 	struct tmio_mmc_dma *dma_priv;
 	struct tmio_mmc_host *host;
@@ -607,6 +626,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 
 	of_data = of_device_get_match_data(&pdev->dev);
 
+	attr = soc_device_match(sdhi_quirks_match);
+	if (attr)
+		quirks = attr->data;
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!res)
 		return -EINVAL;
@@ -672,6 +695,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	host->multi_io_quirk	= renesas_sdhi_multi_io_quirk;
 	host->dma_ops		= dma_ops;
 
+	if (quirks && quirks->hs400_4taps)
+		mmc_data->flags |= TMIO_MMC_HAVE_4TAP_HS400;
+
 	/* For some SoC, we disable internal WP. GPIO may override this */
 	if (mmc_can_gpio_ro(host->mmc))
 		mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
-- 
2.19.1

[PATCH v3 2/3] mmc: renesas_sdhi: align compatibility properties for H3 and M3-W

[Niklas Söderlund]

It was though all ES revisions of H3 and M3-W SoCs required the
TMIO_MMC_HAVE_4TAP_HS400 flag. Recent datasheet updates tells us this is
not true, only early ES revisions of the SoC do.

Since quirk matching based on ES revisions is now used to handle the
flag it's possible to align all Gen3 compatibility properties. This will
allow later ES revisions of H3 and M3-W to use the correct 8-tap HS400
mode.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
---
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 20 ++-----------------
 drivers/mmc/host/renesas_sdhi_sys_dmac.c      | 20 +++----------------
 2 files changed, 5 insertions(+), 35 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index 57e829223c40e0ee..332c5c60edb3d9c4 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -99,22 +99,6 @@ static const struct renesas_sdhi_of_data of_rza2_compatible = {
 	.max_segs	= 1,
 };
 
-static const struct renesas_sdhi_of_data of_rcar_r8a7795_compatible = {
-	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
-			  TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 |
-			  TMIO_MMC_HAVE_4TAP_HS400,
-	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
-			  MMC_CAP_CMD23,
-	.capabilities2	= MMC_CAP2_NO_WRITE_PROTECT,
-	.bus_shift	= 2,
-	.scc_offset	= 0x1000,
-	.taps		= rcar_gen3_scc_taps,
-	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
-	/* DMAC can handle 0xffffffff blk count but only 1 segment */
-	.max_blk_count	= 0xffffffff,
-	.max_segs	= 1,
-};
-
 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
 			  TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
@@ -133,8 +117,8 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
 static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
 	{ .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
 	{ .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
 	{ .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
 	{},
 };
diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index 1a4016f635d398c2..8471160316e073c5 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -75,19 +75,6 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
 	},
 };
 
-static const struct renesas_sdhi_of_data of_rcar_r8a7795_compatible = {
-	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
-			  TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 |
-			  TMIO_MMC_HAVE_4TAP_HS400,
-	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
-			  MMC_CAP_CMD23,
-	.capabilities2	= MMC_CAP2_NO_WRITE_PROTECT,
-	.bus_shift	= 2,
-	.scc_offset	= 0x1000,
-	.taps		= rcar_gen3_scc_taps,
-	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
-};
-
 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
 			  TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
@@ -114,8 +101,8 @@ static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
 	{ .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
 	{ .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
 	{ .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
@@ -493,8 +480,7 @@ static const struct soc_device_attribute gen3_soc_whitelist[] = {
 
 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
 {
-	if ((of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible ||
-	    of_device_get_match_data(&pdev->dev) == &of_rcar_r8a7795_compatible) &&
+	if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
 	    !soc_device_match(gen3_soc_whitelist))
 		return -ENODEV;
 
-- 
2.19.1

[PATCH v3 3/3] mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012]

[Niklas Söderlund]

The Renesas BSP confirms that H3 ES1.x and M3-W ES1.[012] do not
properly support HS400. Add a quirk to indicate this and disable HS400
in the MMC capabilities if the quirk is set.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
* Changes since v2
- s/M3-W ES1.x/M3-W ES1.[012]/ in commit message and topic as HS400 is
  not disabled for M3-W ES1.3. Thanks Geert for pointing this out.
---
 drivers/mmc/host/renesas_sdhi_core.c | 20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index f20df18f49e0d7c5..d4df4e59d9f2a8ad 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -47,6 +47,7 @@
 #define SDHI_VER_GEN3_SDMMC	0xcd10
 
 struct renesas_sdhi_quirks {
+	bool hs400_disabled;
 	bool hs400_4taps;
 };
 
@@ -598,15 +599,21 @@ static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
 	renesas_sdhi_sdbuf_width(host, enable ? width : 16);
 }
 
-static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
+static const struct renesas_sdhi_quirks sdhi_quirks_h3_m3w_es1 = {
+	.hs400_disabled = true,
+	.hs400_4taps = true,
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_h3_es2 = {
+	.hs400_disabled = false,
 	.hs400_4taps = true,
 };
 
 static const struct soc_device_attribute sdhi_quirks_match[]  = {
-	{ .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_4tap },
-	{ .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_4tap },
-	{ .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_4tap },
-	{ .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_4tap },
+	{ .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_h3_m3w_es1 },
+	{ .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_h3_es2 },
+	{ .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_h3_m3w_es1 },
+	{ .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_h3_m3w_es1 },
 	{ /* Sentinel. */ },
 };
 
@@ -695,6 +702,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	host->multi_io_quirk	= renesas_sdhi_multi_io_quirk;
 	host->dma_ops		= dma_ops;
 
+	if (quirks && quirks->hs400_disabled)
+		host->mmc->caps2 &= ~(MMC_CAP2_HS400 | MMC_CAP2_HS400_ES);
+
 	if (quirks && quirks->hs400_4taps)
 		mmc_data->flags |= TMIO_MMC_HAVE_4TAP_HS400;
 
-- 
2.19.1

Re: [PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 108 bytes --]

Hi Niklas,

thanks for the updates! Do you happen to have a branch ready for
testing?

Thanks,

   Wolfram


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Re: [PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Niklas Söderlund]

Hi Wolfram,

On 2018-11-28 22:56:20 +0100, Wolfram Sang wrote:
> Hi Niklas,
> 
> thanks for the updates! Do you happen to have a branch ready for
> testing?

I will push a new branch once I'm done updating the clock patch so all 
changes can be tested in one go. Will let you know once that is 
available. Hopefully later tonight.


-- 
Regards,
Niklas S�derlund

Re: [PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Niklas Söderlund]

Hi Wolfram,

On 2018-11-28 23:06:37 +0100, Niklas S�derlund wrote:
> Hi Wolfram,
> 
> On 2018-11-28 22:56:20 +0100, Wolfram Sang wrote:
> > Hi Niklas,
> > 
> > thanks for the updates! Do you happen to have a branch ready for
> > testing?
> 
> I will push a new branch once I'm done updating the clock patch so all 
> changes can be tested in one go. Will let you know once that is 
> available. Hopefully later tonight.

I have pushed the latest and greatest to [1]. I tested this on H3 ES1, 
H3 ES2.0 and M3-N and it looks good. Speeds for both MMC and SD cards 
match what we saw in Edinburgh.

I still have to post the clock patches to the mailing list but in case 
you wish to test right away I thought I send this mail out before I do 
that :-)

1. git://git.ragnatech.se/linux mmc/hackfest

-- 
Regards,
Niklas S�derlund

Re: [PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 999 bytes --]

On Wed, Nov 28, 2018 at 05:18:26PM +0100, Niklas Söderlund wrote:
> Hi,
> 
> Recent datasheet updates have made it clear that some quirks are not SoC
> specific but SoC + ES version specific. Currently the quirks are
> selected using compatibility values but whit this new information that
> is not enough.
> 
> Patch 1/3 adds support to select quirks based on SoC + ES revision using
> soc_device_match() and converts the only existing quirk. Patch 2/3
> Removes the old method to select quirk based on compatibility string.
> While Patch 3/3 adds a new quirk from the BSP which blacklists some
> known problematic ES versions for HS400. HS400 is not yet enabled
> upstream so blacklisting these ES versions is not a regression of
> functionality.
> 
> Based on mmc/next and tested on H3 and M3-N.

For the record: Tested with H3 ES2.0 and M3N where HS400 was sucesfully
detected. Tested with H3 ES1.0 and M3-W ES1.0 where HS400 was rightfully
discarded and HS200 was used.


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Re: [PATCH v3 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions

[Ulf Hansson]

On Wed, 28 Nov 2018 at 17:19, Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
>
> Hi,
>
> Recent datasheet updates have made it clear that some quirks are not SoC
> specific but SoC + ES version specific. Currently the quirks are
> selected using compatibility values but whit this new information that
> is not enough.
>
> Patch 1/3 adds support to select quirks based on SoC + ES revision using
> soc_device_match() and converts the only existing quirk. Patch 2/3
> Removes the old method to select quirk based on compatibility string.
> While Patch 3/3 adds a new quirk from the BSP which blacklists some
> known problematic ES versions for HS400. HS400 is not yet enabled
> upstream so blacklisting these ES versions is not a regression of
> functionality.
>
> Based on mmc/next and tested on H3 and M3-N.
>
> Niklas Söderlund (3):
>   mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision
>   mmc: renesas_sdhi: align compatibility properties for H3 and M3-W
>   mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012]
>
>  drivers/mmc/host/renesas_sdhi_core.c          | 36 +++++++++++++++++++
>  drivers/mmc/host/renesas_sdhi_internal_dmac.c | 20 ++---------
>  drivers/mmc/host/renesas_sdhi_sys_dmac.c      | 20 ++---------
>  3 files changed, 41 insertions(+), 35 deletions(-)
>
> --
> 2.19.1
>

Applied for next, thanks!

Kind regards
Uffe