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From: Steve Capper <Steve.Capper@arm.com>
To: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: "ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
	"jcm@redhat.com" <jcm@redhat.com>,
	Will Deacon <Will.Deacon@arm.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>, nd <nd@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V3 4/5] arm64: mm: introduce 52-bit userspace support
Date: Tue, 4 Dec 2018 17:41:07 +0000	[thread overview]
Message-ID: <20181204174057.GA10602@capper-debian.cambridge.arm.com> (raw)
In-Reply-To: <20181130175956.GJ43329@arrakis.emea.arm.com>

On Fri, Nov 30, 2018 at 05:59:59PM +0000, Catalin Marinas wrote:
> On Wed, Nov 14, 2018 at 01:39:19PM +0000, Steve Capper wrote:
> > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> > index 50b1ef8584c0..19736520b724 100644
> > --- a/arch/arm64/include/asm/pgtable.h
> > +++ b/arch/arm64/include/asm/pgtable.h
> > @@ -616,11 +616,21 @@ static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
> >  #define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd_val(pgd))
> >  
> >  /* to find an entry in a page-table-directory */
> > -#define pgd_index(addr)		(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
> > +#define pgd_index(addr, ptrs)		(((addr) >> PGDIR_SHIFT) & ((ptrs) - 1))
> > +#define _pgd_offset_raw(pgd, addr, ptrs) ((pgd) + pgd_index(addr, ptrs))
> > +#define pgd_offset_raw(pgd, addr)	(_pgd_offset_raw(pgd, addr, PTRS_PER_PGD))
> >  
> > -#define pgd_offset_raw(pgd, addr)	((pgd) + pgd_index(addr))
> > +static inline pgd_t *pgd_offset(const struct mm_struct *mm, unsigned long addr)
> > +{
> > +	pgd_t *ret;
> > +
> > +	if (IS_ENABLED(CONFIG_ARM64_52BIT_VA) && (mm != &init_mm))
> > +		ret = _pgd_offset_raw(mm->pgd, addr, 1ULL << (vabits_user - PGDIR_SHIFT));
> 
> I think we can make this a constant since the additional 4 bits of the
> user address should be 0 on a 48-bit VA. Once we get the 52-bit kernel
> VA supported, we can probably revert back to a single macro.

Yeah, I see what you mean.

> 
> Another option is to change  PTRS_PER_PGD etc. to cover the whole
> 52-bit, including the swapper_pg_dir, but with offsetting the TTBR1_EL1
> setting to keep the 48-bit kernel VA (for the time being).
> 

I've got a 52-bit PTRS_PER_PGD working now. I will clean things up, run
more tests and then post.

Cheers,
-- 
Steve

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Steve Capper <Steve.Capper@arm.com>
To: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: "linux-mm@kvack.org" <linux-mm@kvack.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Will Deacon <Will.Deacon@arm.com>,
	"jcm@redhat.com" <jcm@redhat.com>,
	"ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
	nd <nd@arm.com>
Subject: Re: [PATCH V3 4/5] arm64: mm: introduce 52-bit userspace support
Date: Tue, 4 Dec 2018 17:41:07 +0000	[thread overview]
Message-ID: <20181204174057.GA10602@capper-debian.cambridge.arm.com> (raw)
In-Reply-To: <20181130175956.GJ43329@arrakis.emea.arm.com>

On Fri, Nov 30, 2018 at 05:59:59PM +0000, Catalin Marinas wrote:
> On Wed, Nov 14, 2018 at 01:39:19PM +0000, Steve Capper wrote:
> > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> > index 50b1ef8584c0..19736520b724 100644
> > --- a/arch/arm64/include/asm/pgtable.h
> > +++ b/arch/arm64/include/asm/pgtable.h
> > @@ -616,11 +616,21 @@ static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
> >  #define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd_val(pgd))
> >  
> >  /* to find an entry in a page-table-directory */
> > -#define pgd_index(addr)		(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
> > +#define pgd_index(addr, ptrs)		(((addr) >> PGDIR_SHIFT) & ((ptrs) - 1))
> > +#define _pgd_offset_raw(pgd, addr, ptrs) ((pgd) + pgd_index(addr, ptrs))
> > +#define pgd_offset_raw(pgd, addr)	(_pgd_offset_raw(pgd, addr, PTRS_PER_PGD))
> >  
> > -#define pgd_offset_raw(pgd, addr)	((pgd) + pgd_index(addr))
> > +static inline pgd_t *pgd_offset(const struct mm_struct *mm, unsigned long addr)
> > +{
> > +	pgd_t *ret;
> > +
> > +	if (IS_ENABLED(CONFIG_ARM64_52BIT_VA) && (mm != &init_mm))
> > +		ret = _pgd_offset_raw(mm->pgd, addr, 1ULL << (vabits_user - PGDIR_SHIFT));
> 
> I think we can make this a constant since the additional 4 bits of the
> user address should be 0 on a 48-bit VA. Once we get the 52-bit kernel
> VA supported, we can probably revert back to a single macro.

Yeah, I see what you mean.

> 
> Another option is to change  PTRS_PER_PGD etc. to cover the whole
> 52-bit, including the swapper_pg_dir, but with offsetting the TTBR1_EL1
> setting to keep the 48-bit kernel VA (for the time being).
> 

I've got a 52-bit PTRS_PER_PGD working now. I will clean things up, run
more tests and then post.

Cheers,
-- 
Steve

  reply	other threads:[~2018-12-04 17:41 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14 13:39 [PATCH V3 0/5] 52-bit userspace VAs Steve Capper
2018-11-14 13:39 ` Steve Capper
2018-11-14 13:39 ` [PATCH V3 1/5] mm: mmap: Allow for "high" userspace addresses Steve Capper
2018-11-14 13:39   ` Steve Capper
2018-11-23 18:17   ` Catalin Marinas
2018-11-23 18:17     ` Catalin Marinas
2018-11-26 12:11     ` Steve Capper
2018-11-26 12:11       ` Steve Capper
2018-11-14 13:39 ` [PATCH V3 2/5] arm64: mm: Introduce DEFAULT_MAP_WINDOW Steve Capper
2018-11-14 13:39   ` Steve Capper
2018-11-27 17:09   ` Catalin Marinas
2018-11-27 17:09     ` Catalin Marinas
2018-11-27 17:15     ` Ard Biesheuvel
2018-11-27 17:15       ` Ard Biesheuvel
2018-11-28 16:31     ` Steve Capper
2018-11-28 16:31       ` Steve Capper
2018-11-14 13:39 ` [PATCH V3 3/5] arm64: mm: Define arch_get_mmap_end, arch_get_mmap_base Steve Capper
2018-11-14 13:39   ` Steve Capper
2018-11-27 17:10   ` Catalin Marinas
2018-11-27 17:10     ` Catalin Marinas
2018-11-28 16:31     ` Steve Capper
2018-11-28 16:31       ` Steve Capper
2018-11-14 13:39 ` [PATCH V3 4/5] arm64: mm: introduce 52-bit userspace support Steve Capper
2018-11-14 13:39   ` Steve Capper
2018-11-23 18:35   ` Catalin Marinas
2018-11-23 18:35     ` Catalin Marinas
2018-11-26 12:13     ` Steve Capper
2018-11-26 12:13       ` Steve Capper
2018-11-30 17:59   ` Catalin Marinas
2018-11-30 17:59     ` Catalin Marinas
2018-12-04 17:41     ` Steve Capper [this message]
2018-12-04 17:41       ` Steve Capper
2018-11-14 13:39 ` [PATCH V3 5/5] arm64: mm: Allow forcing all userspace addresses to 52-bit Steve Capper
2018-11-14 13:39   ` Steve Capper
2018-11-23 18:22   ` Catalin Marinas
2018-11-23 18:22     ` Catalin Marinas
2018-11-26 12:11     ` Steve Capper
2018-11-26 12:11       ` Steve Capper

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