All of lore.kernel.org
 help / color / mirror / Atom feed
From: Steve Capper <Steve.Capper@arm.com>
To: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: "ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
	"jcm@redhat.com" <jcm@redhat.com>,
	Will Deacon <Will.Deacon@arm.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>, nd <nd@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V4 4/6] arm64: mm: Offset TTBR1 to allow 52-bit PTRS_PER_PGD
Date: Thu, 6 Dec 2018 12:27:49 +0000	[thread overview]
Message-ID: <20181206122733.GA17572@capper-debian.cambridge.arm.com> (raw)
In-Reply-To: <20181206115011.GC54495@arrakis.emea.arm.com>

On Thu, Dec 06, 2018 at 11:50:12AM +0000, Catalin Marinas wrote:
> On Wed, Dec 05, 2018 at 04:41:43PM +0000, Steve Capper wrote:
> > diff --git a/arch/arm64/include/asm/asm-uaccess.h b/arch/arm64/include/asm/asm-uaccess.h
> > index 4128bec033f6..cd361dd16b12 100644
> > --- a/arch/arm64/include/asm/asm-uaccess.h
> > +++ b/arch/arm64/include/asm/asm-uaccess.h
> > @@ -14,11 +14,13 @@
> >  #ifdef CONFIG_ARM64_SW_TTBR0_PAN
> >  	.macro	__uaccess_ttbr0_disable, tmp1
> >  	mrs	\tmp1, ttbr1_el1			// swapper_pg_dir
> > +	restore_ttbr1 \tmp1
> >  	bic	\tmp1, \tmp1, #TTBR_ASID_MASK
> >  	sub	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE	// reserved_ttbr0 just before swapper_pg_dir
> >  	msr	ttbr0_el1, \tmp1			// set reserved TTBR0_EL1
> >  	isb
> >  	add	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE
> > +	offset_ttbr1 \tmp1
> >  	msr	ttbr1_el1, \tmp1		// set reserved ASID
> >  	isb
> >  	.endm
> > @@ -27,8 +29,10 @@
> >  	get_thread_info \tmp1
> >  	ldr	\tmp1, [\tmp1, #TSK_TI_TTBR0]	// load saved TTBR0_EL1
> >  	mrs	\tmp2, ttbr1_el1
> > +	restore_ttbr1 \tmp2
> >  	extr    \tmp2, \tmp2, \tmp1, #48
> >  	ror     \tmp2, \tmp2, #16
> > +	offset_ttbr1 \tmp2
> >  	msr	ttbr1_el1, \tmp2		// set the active ASID
> >  	isb
> >  	msr	ttbr0_el1, \tmp1		// set the non-PAN TTBR0_EL1
> 
> The patch looks alright but I think we can simplify it further if we add:
> 
> 	depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
> 
> to the 52-bit Kconfig entry.

Ahh, thank you okay, I didn't make the connection that Privileged access
never was a mandatory feature in ARMv8.1.

Cheers,
-- 
Steve

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Steve Capper <Steve.Capper@arm.com>
To: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: "linux-mm@kvack.org" <linux-mm@kvack.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Will Deacon <Will.Deacon@arm.com>,
	"jcm@redhat.com" <jcm@redhat.com>,
	"ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
	nd <nd@arm.com>
Subject: Re: [PATCH V4 4/6] arm64: mm: Offset TTBR1 to allow 52-bit PTRS_PER_PGD
Date: Thu, 6 Dec 2018 12:27:49 +0000	[thread overview]
Message-ID: <20181206122733.GA17572@capper-debian.cambridge.arm.com> (raw)
In-Reply-To: <20181206115011.GC54495@arrakis.emea.arm.com>

On Thu, Dec 06, 2018 at 11:50:12AM +0000, Catalin Marinas wrote:
> On Wed, Dec 05, 2018 at 04:41:43PM +0000, Steve Capper wrote:
> > diff --git a/arch/arm64/include/asm/asm-uaccess.h b/arch/arm64/include/asm/asm-uaccess.h
> > index 4128bec033f6..cd361dd16b12 100644
> > --- a/arch/arm64/include/asm/asm-uaccess.h
> > +++ b/arch/arm64/include/asm/asm-uaccess.h
> > @@ -14,11 +14,13 @@
> >  #ifdef CONFIG_ARM64_SW_TTBR0_PAN
> >  	.macro	__uaccess_ttbr0_disable, tmp1
> >  	mrs	\tmp1, ttbr1_el1			// swapper_pg_dir
> > +	restore_ttbr1 \tmp1
> >  	bic	\tmp1, \tmp1, #TTBR_ASID_MASK
> >  	sub	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE	// reserved_ttbr0 just before swapper_pg_dir
> >  	msr	ttbr0_el1, \tmp1			// set reserved TTBR0_EL1
> >  	isb
> >  	add	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE
> > +	offset_ttbr1 \tmp1
> >  	msr	ttbr1_el1, \tmp1		// set reserved ASID
> >  	isb
> >  	.endm
> > @@ -27,8 +29,10 @@
> >  	get_thread_info \tmp1
> >  	ldr	\tmp1, [\tmp1, #TSK_TI_TTBR0]	// load saved TTBR0_EL1
> >  	mrs	\tmp2, ttbr1_el1
> > +	restore_ttbr1 \tmp2
> >  	extr    \tmp2, \tmp2, \tmp1, #48
> >  	ror     \tmp2, \tmp2, #16
> > +	offset_ttbr1 \tmp2
> >  	msr	ttbr1_el1, \tmp2		// set the active ASID
> >  	isb
> >  	msr	ttbr0_el1, \tmp1		// set the non-PAN TTBR0_EL1
> 
> The patch looks alright but I think we can simplify it further if we add:
> 
> 	depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
> 
> to the 52-bit Kconfig entry.

Ahh, thank you okay, I didn't make the connection that Privileged access
never was a mandatory feature in ARMv8.1.

Cheers,
-- 
Steve

  reply	other threads:[~2018-12-06 12:42 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-05 16:41 [PATCH V4 0/6] 52-bit userspace VAs Steve Capper
2018-12-05 16:41 ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 1/6] mm: mmap: Allow for "high" userspace addresses Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 2/6] arm64: mm: Introduce DEFAULT_MAP_WINDOW Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-05 17:36   ` Catalin Marinas
2018-12-05 17:36     ` Catalin Marinas
2018-12-06 12:24     ` Steve Capper
2018-12-06 12:24       ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 3/6] arm64: mm: Define arch_get_mmap_end, arch_get_mmap_base Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 4/6] arm64: mm: Offset TTBR1 to allow 52-bit PTRS_PER_PGD Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-06 11:50   ` Catalin Marinas
2018-12-06 11:50     ` Catalin Marinas
2018-12-06 12:27     ` Steve Capper [this message]
2018-12-06 12:27       ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 5/6] arm64: mm: introduce 52-bit userspace support Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-05 18:22   ` Suzuki K Poulose
2018-12-05 18:22     ` Suzuki K Poulose
2018-12-06 12:26     ` Steve Capper
2018-12-06 12:26       ` Steve Capper
2018-12-06 14:35       ` Suzuki K Poulose
2018-12-06 14:35         ` Suzuki K Poulose
2018-12-06 14:52         ` Steve Capper
2018-12-06 14:52           ` Steve Capper
2018-12-05 16:41 ` [PATCH V4 6/6] arm64: mm: Allow forcing all userspace addresses to 52-bit Steve Capper
2018-12-05 16:41   ` Steve Capper
2018-12-06 11:51   ` Catalin Marinas
2018-12-06 11:51     ` Catalin Marinas
2018-12-06 12:28     ` Steve Capper
2018-12-06 12:28       ` Steve Capper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181206122733.GA17572@capper-debian.cambridge.arm.com \
    --to=steve.capper@arm.com \
    --cc=Catalin.Marinas@arm.com \
    --cc=Will.Deacon@arm.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=jcm@redhat.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-mm@kvack.org \
    --cc=nd@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.