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From: Rob Herring <robh@kernel.org>
To: Parthiban Nallathambi <pn@denx.de>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	linux@cubietech.com, jason@lakedaemon.net, marc.zyngier@arm.com,
	catalin.marinas@arm.com, laisa.costa@lsitec.org.br,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	thomas.liau@actions-semi.com, edgar.righi@lsitec.org.br,
	guilherme.simoes@lsitec.org.br, mp-cs@actions-semi.com,
	manivannan.sadhasivam@linaro.org, tglx@linutronix.de,
	mkzuffo@lsi.usp.br, afaerber@suse.de,
	linux-arm-kernel@lists.infradead.org,
	Saravanan Sekar <sravanhome@gmail.com>
Subject: Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Actions external interrupt controller
Date: Fri, 7 Dec 2018 17:29:34 -0600	[thread overview]
Message-ID: <20181207232934.GA28201@bogus> (raw)
In-Reply-To: <20181126100356.2840578-2-pn@denx.de>

On Mon, Nov 26, 2018 at 11:03:53AM +0100, Parthiban Nallathambi wrote:
> Actions Semi OWL family SoC's provides support for external interrupt
> controller to be connected and controlled using SIRQ pins. S500, S700
> and S900 provides 3 SIRQ lines and works independently for 3 external
> interrupt controllers.
> 
> Signed-off-by: Parthiban Nallathambi <pn@denx.de>
> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
> ---
>  .../interrupt-controller/actions,owl-sirq.txt | 57 +++++++++++++++++++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> new file mode 100644
> index 000000000000..b3adc4bddf40
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> @@ -0,0 +1,57 @@
> +Actions Semi Owl SoCs SIRQ interrupt controller
> +
> +S500, S700 and S900 SoC's from Actions provides 3 SPI's from GIC,

Listing SoCs here means you have to update this line for every new SoC.

> +in which external interrupt controller can be connected. 3 SPI's
> +45, 46, 47 from GIC are directly exposed as SIRQ. It has
> +the following properties:
> +
> +- inputs three interrupt signal from external interrupt controller
> +
> +Required properties:
> +
> +- compatible: should be "actions,owl-sirq"

SoC specific compatibles needed.

> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +- interrupt-controller: identifies the node as an interrupt controller
> +- #interrupt-cells: specifies the number of cells needed to encode an interrupt
> +  source, should be 2.
> +- actions,sirq-shared-reg: Applicable for S500 and S700 where SIRQ register
> +  details are maintained at same offset/register.
> +- actions,sirq-reg-offset: register offset for SIRQ interrupts. When registers are
> +  shared, all the three offsets will be same (S500 and S700).

These properties should be implied by the compatible string.

> +- actions,ext-irq-range: Identifies external irq number range in different SoCs.

Why is this needed? It appears to always be the same.

> +
> +Example for S900:
> +
> +sirq: interrupt-controller@e01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xe01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-offset = <0x200 0x528 0x52c>;
> +	actions,ext-irq-range = <13 15>;
> +};
> +
> +Example for S700:

Examples are examples, not an enumeration of all possible dts entries. 
So 1 should be sufficient.

> +
> +sirq: interrupt-controller@e01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xe01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-shared-reg;
> +	actions,sirq-reg-offset = <0x200 0x200 0x200>;
> +	actions,ext-irq-range = <13 15>;
> +};
> +
> +Example for S500:
> +
> +sirq: interrupt-controller@b01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xb01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-shared-reg;
> +	actions,sirq-offset = <0x200 0x200 0x200>;
> +	actions,ext-irq-range = <13 15>;
> +};
> -- 
> 2.17.2
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Parthiban Nallathambi <pn@denx.de>
Cc: marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net,
	mark.rutland@arm.com, afaerber@suse.de, catalin.marinas@arm.com,
	will.deacon@arm.com, manivannan.sadhasivam@linaro.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	thomas.liau@actions-semi.com, mp-cs@actions-semi.com,
	linux@cubietech.com, edgar.righi@lsitec.org.br,
	laisa.costa@lsitec.org.br, guilherme.simoes@lsitec.org.br,
	mkzuffo@lsi.usp.br, Saravanan Sekar <sravanhome@gmail.com>
Subject: Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Actions external interrupt controller
Date: Fri, 7 Dec 2018 17:29:34 -0600	[thread overview]
Message-ID: <20181207232934.GA28201@bogus> (raw)
In-Reply-To: <20181126100356.2840578-2-pn@denx.de>

On Mon, Nov 26, 2018 at 11:03:53AM +0100, Parthiban Nallathambi wrote:
> Actions Semi OWL family SoC's provides support for external interrupt
> controller to be connected and controlled using SIRQ pins. S500, S700
> and S900 provides 3 SIRQ lines and works independently for 3 external
> interrupt controllers.
> 
> Signed-off-by: Parthiban Nallathambi <pn@denx.de>
> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
> ---
>  .../interrupt-controller/actions,owl-sirq.txt | 57 +++++++++++++++++++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> new file mode 100644
> index 000000000000..b3adc4bddf40
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt
> @@ -0,0 +1,57 @@
> +Actions Semi Owl SoCs SIRQ interrupt controller
> +
> +S500, S700 and S900 SoC's from Actions provides 3 SPI's from GIC,

Listing SoCs here means you have to update this line for every new SoC.

> +in which external interrupt controller can be connected. 3 SPI's
> +45, 46, 47 from GIC are directly exposed as SIRQ. It has
> +the following properties:
> +
> +- inputs three interrupt signal from external interrupt controller
> +
> +Required properties:
> +
> +- compatible: should be "actions,owl-sirq"

SoC specific compatibles needed.

> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +- interrupt-controller: identifies the node as an interrupt controller
> +- #interrupt-cells: specifies the number of cells needed to encode an interrupt
> +  source, should be 2.
> +- actions,sirq-shared-reg: Applicable for S500 and S700 where SIRQ register
> +  details are maintained at same offset/register.
> +- actions,sirq-reg-offset: register offset for SIRQ interrupts. When registers are
> +  shared, all the three offsets will be same (S500 and S700).

These properties should be implied by the compatible string.

> +- actions,ext-irq-range: Identifies external irq number range in different SoCs.

Why is this needed? It appears to always be the same.

> +
> +Example for S900:
> +
> +sirq: interrupt-controller@e01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xe01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-offset = <0x200 0x528 0x52c>;
> +	actions,ext-irq-range = <13 15>;
> +};
> +
> +Example for S700:

Examples are examples, not an enumeration of all possible dts entries. 
So 1 should be sufficient.

> +
> +sirq: interrupt-controller@e01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xe01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-shared-reg;
> +	actions,sirq-reg-offset = <0x200 0x200 0x200>;
> +	actions,ext-irq-range = <13 15>;
> +};
> +
> +Example for S500:
> +
> +sirq: interrupt-controller@b01b0000 {
> +	compatible = "actions,owl-sirq";
> +	reg = <0x0 0xb01b0000 0x0 0x1000>;
> +	interrupt-controller;
> +	#interrupt-cells = <3>;
> +	actions,sirq-shared-reg;
> +	actions,sirq-offset = <0x200 0x200 0x200>;
> +	actions,ext-irq-range = <13 15>;
> +};
> -- 
> 2.17.2
> 

  reply	other threads:[~2018-12-07 23:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-26 10:03 [PATCH v3 0/4] Add Actions Semi Owl family sirq support Parthiban Nallathambi
2018-11-26 10:03 ` Parthiban Nallathambi
2018-11-26 10:03 ` [PATCH v3 1/4] dt-bindings: interrupt-controller: Actions external interrupt controller Parthiban Nallathambi
2018-11-26 10:03   ` Parthiban Nallathambi
2018-12-07 23:29   ` Rob Herring [this message]
2018-12-07 23:29     ` Rob Herring
2018-12-09 19:26     ` Parthiban Nallathambi
2018-12-09 19:26       ` Parthiban Nallathambi
2018-12-09 19:26       ` Parthiban Nallathambi
2018-11-26 10:03 ` [PATCH v3 2/4] drivers/irqchip: Add Actions external interrupts support Parthiban Nallathambi
2018-11-26 10:03   ` Parthiban Nallathambi
2018-12-07 18:39   ` Marc Zyngier
2018-12-07 18:39     ` Marc Zyngier
2018-11-26 10:03 ` [PATCH v3 3/4] arm64: dts: actions: Add sirq node for Actions Semi S700 Parthiban Nallathambi
2018-11-26 10:03   ` Parthiban Nallathambi

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