From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Gregory Clement <gregory.clement@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH 4/4] dt-bindings: clk: armada3700: document the PCIe clock
Date: Tue, 11 Dec 2018 15:36:20 -0600 [thread overview]
Message-ID: <20181211213620.GA15108@bogus> (raw)
In-Reply-To: <20181123094444.27956-5-miquel.raynal@bootlin.com>
On Fri, 23 Nov 2018 10:44:43 +0100, Miquel Raynal wrote:
> Add a reference to the missing PCIe clock managed by this IP. The
> clock resides in the south bridge.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> .../devicetree/bindings/clock/armada3700-periph-clock.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Gregory Clement <gregory.clement@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>
Subject: Re: [PATCH 4/4] dt-bindings: clk: armada3700: document the PCIe clock
Date: Tue, 11 Dec 2018 15:36:20 -0600 [thread overview]
Message-ID: <20181211213620.GA15108@bogus> (raw)
In-Reply-To: <20181123094444.27956-5-miquel.raynal@bootlin.com>
On Fri, 23 Nov 2018 10:44:43 +0100, Miquel Raynal wrote:
> Add a reference to the missing PCIe clock managed by this IP. The
> clock resides in the south bridge.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> .../devicetree/bindings/clock/armada3700-periph-clock.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2018-12-11 21:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-23 9:44 [PATCH 0/4] Prepare Armada 3700 PCIe suspend to RAM support Miquel Raynal
2018-11-23 9:44 ` [PATCH 1/4] clk: mvebu: armada-37xx-periph: add PCIe gated clock Miquel Raynal
2018-11-23 9:44 ` [PATCH 2/4] clk: mvebu: armada-37xx-periph: change suspend/resume time Miquel Raynal
2018-11-30 0:37 ` Stephen Boyd
2018-11-30 0:37 ` Stephen Boyd
2018-11-30 10:58 ` Miquel Raynal
2018-12-12 21:59 ` Bjorn Helgaas
2019-01-11 13:44 ` Miquel Raynal
2018-11-23 9:44 ` [PATCH 3/4] dt-bindings: clk: armada3700: fix typo in SoC name Miquel Raynal
2018-12-11 21:35 ` Rob Herring
2018-12-11 21:35 ` Rob Herring
2018-11-23 9:44 ` [PATCH 4/4] dt-bindings: clk: armada3700: document the PCIe clock Miquel Raynal
2018-12-11 21:36 ` Rob Herring [this message]
2018-12-11 21:36 ` Rob Herring
2019-02-25 15:05 ` [PATCH 0/4] Prepare Armada 3700 PCIe suspend to RAM support Miquel Raynal
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