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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Wei Liu <wei.liu2@citrix.com>,
	"Nakajima, Jun" <jun.nakajima@intel.com>,
	Jan Beulich <JBeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: Interrupt injection with ISR set on Intel hardware
Date: Wed, 12 Dec 2018 12:24:36 +0100	[thread overview]
Message-ID: <20181212112436.dtnd6sum5mztleih@mac> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D19BE9DA20@SHSMSX101.ccr.corp.intel.com>

On Wed, Dec 12, 2018 at 10:36:44AM +0000, Tian, Kevin wrote:
> > From: Roger Pau Monné [mailto:roger.pau@citrix.com]
> > Sent: Monday, October 15, 2018 6:30 PM
> > (XEN)   [22642] POWER    TYPE 4
> > (XEN)   [22643] IDLE     PPR 0x00000020
> > (XEN)                    IRR
> > 00000000000000000000000000000000000000000000000000000000000000
> > 00
> > (XEN)                    ISR
> > 00000000020000000000000000000000000000000000000000000000000000
> > 00
> > (XEN)   [22644] WAKE     PPR 0x00000020
> > (XEN)                    IRR
> > 00000000020000000000000000000000000000000000000000000000000000
> > 00
> > (XEN)                    ISR
> > 00000000020000000000000000000000000000000000000000000000000000
> > 00
> 
> looks pending IRR (0x21) doesn't always trigger a spurious interrupt?

Yes, that's correct. Having a pending IRR and going idle doesn't
always trigger the spurious interrupt re-injection.

> is it a fixed pattern after how many rounds of Cstate enter/exit with
> pending IRR(0x21) then you see assertion happened (in this example
> it happens at 3rd time)?

It's not a fixed pattern, here's another trace with IRR(0x21) being
pending just once during the Cstate transitions:

(XEN) *** Pending EOI error ***
(XEN)   cpu #1, irq 30, vector 0x21, sp 1
(XEN) Peoi stack: sp 1
(XEN)   [ 0] irq  30, vec 0x21, ready 0, ISR 1, TMR 0, IRR 0
(XEN) Peoi stack trace records:
(XEN)   [ 7886] ACK_POST PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7887] POWER    TYPE 5
(XEN)   [ 7888] IDLE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7889] WAKE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7890] ACK_PRE  PPR 0x000000f0
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)   [ 7891] ACK_POST PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7892] POWER    TYPE 5
(XEN)   [ 7893] IDLE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7894] WAKE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7895] ACK_PRE  PPR 0x000000f0
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)   [ 7896] ACK_POST PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7897] POWER    TYPE 5
(XEN)   [ 7898] IDLE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7899] WAKE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7900] ACK_PRE  PPR 0x000000f0
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000004
(XEN)   [ 7901] ACK_POST PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7902] POWER    TYPE 5
(XEN)   [ 7903] IDLE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7904] WAKE     PPR 0x00000010
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)   [ 7905] PUSH     {sp  0, irq  30, vec 0x21}
(XEN)   [ 7906] POWER    TYPE 3
(XEN)   [ 7907] IDLE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7908] WAKE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7909] POWER    TYPE 3
(XEN)   [ 7910] IDLE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7911] WAKE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7912] POWER    TYPE 3
(XEN)   [ 7913] IDLE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7914] WAKE     PPR 0x00000020
(XEN)                    IRR 0000000000000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7915] POWER    TYPE 3
(XEN)   [ 7916] IDLE     PPR 0x00000020
(XEN)                    IRR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)   [ 7917] WAKE     PPR 0x00000020
(XEN)                    IRR 0000000002000000000000000000000000000000000000000000000000000000
(XEN)                    ISR 0000000002000000000000000000000000000000000000000000000000000000
(XEN) All LAPIC state:
(XEN)   [vector]      ISR      TMR      IRR
(XEN)   [1f:00]  00000000 00000000 00000000
(XEN)   [3f:20]  00000002 00000000 00000000
(XEN)   [5f:40]  00000000 00000000 00000000
(XEN)   [7f:60]  00000000 00000000 00000000
(XEN)   [9f:80]  00000000 00000000 00000000
(XEN)   [bf:a0]  00000000 00000000 00000000
(XEN)   [df:c0]  00000000 00000000 00000000
(XEN)   [ff:e0]  00000000 00000000 04000000
(XEN) Assertion '(sp == 0) || (peoi[sp-1].vector < vector)' failed at irq.c:1340
(XEN) ----[ Xen-4.12-unstable  x86_64  debug=y   Tainted:  C   ]----
(XEN) CPU:    1
(XEN) RIP:    e008:[<ffff82d080288e1d>] do_IRQ+0x91c/0xb08
(XEN) RFLAGS: 0000000000010012   CONTEXT: hypervisor
(XEN) rax: ffff83086c67002c   rbx: 0000000000000180   rcx: 0000000000000000
(XEN) rdx: ffff83086c687fff   rsi: 000000000000000a   rdi: ffff83086c601e24
(XEN) rbp: ffff83086c687d98   rsp: ffff83086c687d38   r8:  ffff83086c690000
(XEN) r9:  0000000000000030   r10: 0000000004000000   r11: 0000000000000007
(XEN) r12: 000000000000011f   r13: 00000000ffffffff   r14: ffff83086c601e00
(XEN) r15: ffff82cfffffb100   cr0: 0000000080050033   cr4: 00000000003526e0
(XEN) cr3: 0000000855b9f000   cr2: 00007f86c9ffd708
(XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 0000000000000000
(XEN) ds: 0000   es: 0000   fs: 0000   gs: 0000   ss: 0000   cs: e008
(XEN) Xen code around <ffff82d080288e1d> (do_IRQ+0x91c/0xb08):
(XEN)  8d 7e 24 e8 6b 4c fb ff <0f> 0b 0f 0b 0f 0b 0f 0b b8 00 00 00 00 eb 4e 83
(XEN) Xen stack trace from rsp=ffff83086c687d38:
(XEN)    ffff82d000000000 ffff83086c601e24 0000000000000000 ffff83086c6704e0
(XEN)    ffff82d080384841 ffff82d080384835 ffff82d080384841 0000000000000000
(XEN)    0000000000000000 0000000000000000 ffff83086c687fff 0000000000000000
(XEN)    00007cf793978237 ffff82d0803848aa 00000002c9f5819b 0000000000000008
(XEN)    ffff83086c6738d8 ffff83086c673820 ffff83086c687ec0 00000002c9f631f5
(XEN)    ffff83086c6708f8 ffff83086c6704e0 ffff83086c670918 0000000000000180
(XEN)    ffff83086c67002c 0000000000000000 ffff83086c687fff 0000000000000ffb
(XEN)    ffff83086c673850 0000002100000000 ffff82d0802e8ba9 000000000000e008
(XEN)    0000000000000202 ffff83086c687e50 0000000000000000 ffff83086c68f000
(XEN)    00000020ffffffff 0000000000000000 ffff83086c687ee8 ffff82d0805a3900
(XEN)    0000000000000000 0000000000000000 000003530000012a ffff82d0805ab880
(XEN)    0000000000000001 ffff82d0805a3900 0000000000000001 0000000000000001
(XEN)    ffff83085607d000 ffff83086c687ef0 ffff82d080278a68 ffff83086c6a5000
(XEN)    ffff83086c68f000 ffff830851580000 ffff83086c6a5000 ffff83086c687da8
(XEN)    0000000000000000 0000000000000000 ffff880269a39e80 ffff880269a39e80
(XEN)    0000000000000004 0000000000000004 0000000000000001 00000000000000f3
(XEN)    0000000000000000 000000000b2777bc ffffffff816fe980 ffff88027331a7c0
(XEN)    ffffffff82049af8 ffff88027331a7c0 00000000cb5efd00 0000beef0000beef
(XEN)    ffffffff816fec52 000000bf0000beef 0000000000000246 ffffc90000d0be98
(XEN)    000000000000beef 000000000000beef 000000000000beef 000000000000beef
(XEN) Xen call trace:
(XEN)    [<ffff82d080288e1d>] do_IRQ+0x91c/0xb08
(XEN)    [<ffff82d0803848aa>] common_interrupt+0x10a/0x120
(XEN)    [<ffff82d0802e8ba9>] mwait-idle.c#mwait_idle+0x2a5/0x381
(XEN)    [<ffff82d080278a68>] domain.c#idle_loop+0xb3/0xb5
(XEN)
(XEN)
(XEN) ****************************************
(XEN) Panic on CPU 1:
(XEN) Assertion '(sp == 0) || (peoi[sp-1].vector < vector)' failed at irq.c:1340
(XEN) ****************************************
(XEN)
(XEN) Manual reset required ('noreboot' specified)

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  reply	other threads:[~2018-12-12 11:25 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-15 10:30 Interrupt injection with ISR set on Intel hardware Roger Pau Monné
2018-10-15 12:06 ` Andrew Cooper
2018-10-22  7:33   ` Chao Gao
2018-10-22  7:57     ` Andrew Cooper
2018-10-29 11:22     ` Roger Pau Monné
2018-10-25 12:51   ` Jan Beulich
2018-10-25 13:02     ` Andrew Cooper
2018-10-25 13:57       ` Jan Beulich
2018-10-30  6:59         ` Tian, Kevin
     [not found]         ` <AADFC41AFE54684AB9EE6CBC0274A5D19BE2BAB0@SHSMSX101.ccr.corp.intel.com>
2018-11-01  0:40           ` Tian, Kevin
2018-11-01  9:18             ` Andrew Cooper
2018-11-28  9:19               ` Roger Pau Monné
2018-12-02  8:52                 ` Tian, Kevin
2018-10-29 16:33 ` Jan Beulich
2018-10-29 16:44   ` Andrew Cooper
2018-10-29 16:58     ` Jan Beulich
2018-10-29 17:06       ` Andrew Cooper
2018-10-30  7:32         ` Jan Beulich
2018-10-29 16:55   ` Roger Pau Monné
2018-12-12 10:36 ` Tian, Kevin
2018-12-12 11:24   ` Roger Pau Monné [this message]
2018-12-12 11:48     ` Tian, Kevin
2018-12-12 12:17       ` Roger Pau Monné
2018-12-13  1:28         ` Tian, Kevin
2018-12-13  8:36           ` Jan Beulich
2018-12-13  9:03             ` Tian, Kevin
2018-12-13  8:52           ` Roger Pau Monné
     [not found]         ` <AADFC41AFE54684AB9EE6CBC0274A5D19BE9E951@SHSMSX101.ccr.corp.intel.com>
2018-12-13  2:44           ` Tian, Kevin
2018-12-13  8:39             ` Roger Pau Monné
2018-12-13  9:04               ` Tian, Kevin

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