* [PATCH 0/2] Add board support for Chameleon96 Board
@ 2018-12-15 3:01 ` Manivannan Sadhasivam
0 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2018-12-15 3:01 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, linux-arm-kernel, amit.kucheria, yossi,
nazik, Manivannan Sadhasivam
Hello,
This patchset adds board support for Chameleon96 board from Novetech
based on Intel Cyclone V SoC FPGA. This board is one of the Consumer
Edition boards of the 96Boards family and has the following key features:
* SoC - Intel Cyclone V SoC FPGA
* GPU - Graphics based on Intel Video Suite for FPGA
* RAM - 512MB DDR3L
* USB - 2x USB2.0 Host, 1x USB2.0 OTG
* Wireless - Wifi, BT
More information about this board can be found in 96Boards product
page: https://www.96boards.org/product/chameleon96/
This patchset has been tested on Chameleon96 board and the board boots
into a distro on SD card with USB ports working.
Thanks,
Mani
Manivannan Sadhasivam (2):
dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
ARM: dts: Add support for 96Boards Chameleon96 board
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/socfpga_cyclone5_chameleon96.dts | 130 ++++++++++++++++++
3 files changed, 132 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
--
2.17.1
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/2] dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
2018-12-15 3:01 ` Manivannan Sadhasivam
@ 2018-12-15 3:01 ` Manivannan Sadhasivam
-1 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2018-12-15 3:01 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, amit.kucheria, nazik, yossi,
Manivannan Sadhasivam, linux-arm-kernel
Add vendor prefix for NovTech, Inc.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 4b1a2a8fcc16..ac182966249c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -270,6 +270,7 @@ nintendo Nintendo
nlt NLT Technologies, Ltd.
nokia Nokia
nordic Nordic Semiconductor
+novtech NovTech, Inc.
nutsboard NutsBoard
nuvoton Nuvoton Technology Corporation
nvd New Vision Display
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/2] dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
@ 2018-12-15 3:01 ` Manivannan Sadhasivam
0 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2018-12-15 3:01 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, linux-arm-kernel, amit.kucheria, yossi,
nazik, Manivannan Sadhasivam
Add vendor prefix for NovTech, Inc.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 4b1a2a8fcc16..ac182966249c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -270,6 +270,7 @@ nintendo Nintendo
nlt NLT Technologies, Ltd.
nokia Nokia
nordic Nordic Semiconductor
+novtech NovTech, Inc.
nutsboard NutsBoard
nuvoton Nuvoton Technology Corporation
nvd New Vision Display
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
2018-12-15 3:01 ` Manivannan Sadhasivam
(?)
@ 2018-12-20 20:46 ` Rob Herring
-1 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2018-12-20 20:46 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: devicetree, linux-kernel, amit.kucheria, dinguyen, nazik, robh+dt,
yossi, Manivannan Sadhasivam, linux-arm-kernel
On Sat, 15 Dec 2018 08:31:51 +0530, Manivannan Sadhasivam wrote:
> Add vendor prefix for NovTech, Inc.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
@ 2018-12-20 20:46 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2018-12-20 20:46 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: dinguyen, robh+dt, devicetree, linux-kernel, linux-arm-kernel,
amit.kucheria, yossi, nazik, Manivannan Sadhasivam
On Sat, 15 Dec 2018 08:31:51 +0530, Manivannan Sadhasivam wrote:
> Add vendor prefix for NovTech, Inc.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
@ 2018-12-20 20:46 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2018-12-20 20:46 UTC (permalink / raw)
Cc: dinguyen, robh+dt, devicetree, linux-kernel, linux-arm-kernel,
amit.kucheria, yossi, nazik, Manivannan Sadhasivam
On Sat, 15 Dec 2018 08:31:51 +0530, Manivannan Sadhasivam wrote:
> Add vendor prefix for NovTech, Inc.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/2] ARM: dts: Add support for 96Boards Chameleon96 board
2018-12-15 3:01 ` Manivannan Sadhasivam
@ 2018-12-15 3:01 ` Manivannan Sadhasivam
-1 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2018-12-15 3:01 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, amit.kucheria, nazik, yossi,
Manivannan Sadhasivam, linux-arm-kernel
Add devicetree support for 96Boards Chameleon96 board from Novtech, Inc.
based on Altera CycloneV SoC FPGA. This board is one of the Consumer
Edition boards of the 96Boards family and has the following key features:
* SoC - Intel Cyclone V SoC FPGA
* GPU - Graphics based on Intel Video Suite for FPGA
* RAM - 512MB DDR3L
* USB - 2x USB2.0 Host, 1x USB2.0 OTG
* Wireless - Wifi, BT
More information about this board can be found in 96Boards product
page: https://www.96boards.org/product/chameleon96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/socfpga_cyclone5_chameleon96.dts | 130 ++++++++++++++++++
2 files changed, 131 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b0e966d625b9..d6cf081ec325 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -897,6 +897,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_qspi.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
+ socfpga_cyclone5_chameleon96.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts b/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
new file mode 100644
index 000000000000..f6561766d83f
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for the Chameleon96
+ *
+ * Copyright (c) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Novetech Chameleon96";
+ compatible = "novtech,chameleon96", "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x20000000>; /* 512MB */
+ };
+
+ regulator_3_3v: 3-3-v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user_led1 {
+ label = "green:user1";
+ gpios = <&porta 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "green:user2";
+ gpios = <&porta 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led3 {
+ label = "green:user3";
+ gpios = <&porta 25 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+
+ user_led4 {
+ label = "green:user4";
+ gpios = <&portb 3 GPIO_ACTIVE_LOW>;
+ panic-indicator;
+ linux,default-trigger = "none";
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&i2c0 {
+ /* On Low speed expansion */
+ label = "LS-I2C0";
+ status = "okay";
+};
+
+&i2c1 {
+ /* On Low speed expansion */
+ label = "LS-I2C1";
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ /* On High speed expansion */
+ label = "HS-I2C2";
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
+ status = "okay";
+};
+
+&spi0 {
+ /* On High speed expansion */
+ label = "HS-SPI1";
+ status = "okay";
+};
+
+&spi1 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+};
+
+&uart0 {
+ /* On Low speed expansion */
+ label = "LS-UART1";
+ status = "okay";
+};
+
+&uart1 {
+ /* On Low speed expansion */
+ label = "LS-UART0";
+ status = "okay";
+};
+
+&usbphy0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH 2/2] ARM: dts: Add support for 96Boards Chameleon96 board
@ 2018-12-15 3:01 ` Manivannan Sadhasivam
0 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2018-12-15 3:01 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, linux-arm-kernel, amit.kucheria, yossi,
nazik, Manivannan Sadhasivam
Add devicetree support for 96Boards Chameleon96 board from Novtech, Inc.
based on Altera CycloneV SoC FPGA. This board is one of the Consumer
Edition boards of the 96Boards family and has the following key features:
* SoC - Intel Cyclone V SoC FPGA
* GPU - Graphics based on Intel Video Suite for FPGA
* RAM - 512MB DDR3L
* USB - 2x USB2.0 Host, 1x USB2.0 OTG
* Wireless - Wifi, BT
More information about this board can be found in 96Boards product
page: https://www.96boards.org/product/chameleon96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/socfpga_cyclone5_chameleon96.dts | 130 ++++++++++++++++++
2 files changed, 131 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b0e966d625b9..d6cf081ec325 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -897,6 +897,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_qspi.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
+ socfpga_cyclone5_chameleon96.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts b/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
new file mode 100644
index 000000000000..f6561766d83f
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for the Chameleon96
+ *
+ * Copyright (c) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Novetech Chameleon96";
+ compatible = "novtech,chameleon96", "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x20000000>; /* 512MB */
+ };
+
+ regulator_3_3v: 3-3-v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user_led1 {
+ label = "green:user1";
+ gpios = <&porta 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "green:user2";
+ gpios = <&porta 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led3 {
+ label = "green:user3";
+ gpios = <&porta 25 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+
+ user_led4 {
+ label = "green:user4";
+ gpios = <&portb 3 GPIO_ACTIVE_LOW>;
+ panic-indicator;
+ linux,default-trigger = "none";
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&i2c0 {
+ /* On Low speed expansion */
+ label = "LS-I2C0";
+ status = "okay";
+};
+
+&i2c1 {
+ /* On Low speed expansion */
+ label = "LS-I2C1";
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ /* On High speed expansion */
+ label = "HS-I2C2";
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
+ status = "okay";
+};
+
+&spi0 {
+ /* On High speed expansion */
+ label = "HS-SPI1";
+ status = "okay";
+};
+
+&spi1 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+};
+
+&uart0 {
+ /* On Low speed expansion */
+ label = "LS-UART1";
+ status = "okay";
+};
+
+&uart1 {
+ /* On Low speed expansion */
+ label = "LS-UART0";
+ status = "okay";
+};
+
+&usbphy0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 0/2] Add board support for Chameleon96 Board
2018-12-15 3:01 ` Manivannan Sadhasivam
@ 2019-01-08 6:43 ` Manivannan Sadhasivam
-1 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2019-01-08 6:43 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, amit.kucheria, nazik, yossi,
linux-arm-kernel
On Sat, Dec 15, 2018 at 08:31:50AM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds board support for Chameleon96 board from Novetech
> based on Intel Cyclone V SoC FPGA. This board is one of the Consumer
> Edition boards of the 96Boards family and has the following key features:
>
> * SoC - Intel Cyclone V SoC FPGA
> * GPU - Graphics based on Intel Video Suite for FPGA
> * RAM - 512MB DDR3L
> * USB - 2x USB2.0 Host, 1x USB2.0 OTG
> * Wireless - Wifi, BT
>
> More information about this board can be found in 96Boards product
> page: https://www.96boards.org/product/chameleon96/
>
> This patchset has been tested on Chameleon96 board and the board boots
> into a distro on SD card with USB ports working.
>
Hi,
Ping on this series!
Thanks,
Mani
> Thanks,
> Mani
>
> Manivannan Sadhasivam (2):
> dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
> ARM: dts: Add support for 96Boards Chameleon96 board
>
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> arch/arm/boot/dts/Makefile | 1 +
> .../boot/dts/socfpga_cyclone5_chameleon96.dts | 130 ++++++++++++++++++
> 3 files changed, 132 insertions(+)
> create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
>
> --
> 2.17.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/2] Add board support for Chameleon96 Board
@ 2019-01-08 6:43 ` Manivannan Sadhasivam
0 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2019-01-08 6:43 UTC (permalink / raw)
To: dinguyen, robh+dt
Cc: devicetree, linux-kernel, linux-arm-kernel, amit.kucheria, yossi,
nazik
On Sat, Dec 15, 2018 at 08:31:50AM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds board support for Chameleon96 board from Novetech
> based on Intel Cyclone V SoC FPGA. This board is one of the Consumer
> Edition boards of the 96Boards family and has the following key features:
>
> * SoC - Intel Cyclone V SoC FPGA
> * GPU - Graphics based on Intel Video Suite for FPGA
> * RAM - 512MB DDR3L
> * USB - 2x USB2.0 Host, 1x USB2.0 OTG
> * Wireless - Wifi, BT
>
> More information about this board can be found in 96Boards product
> page: https://www.96boards.org/product/chameleon96/
>
> This patchset has been tested on Chameleon96 board and the board boots
> into a distro on SD card with USB ports working.
>
Hi,
Ping on this series!
Thanks,
Mani
> Thanks,
> Mani
>
> Manivannan Sadhasivam (2):
> dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
> ARM: dts: Add support for 96Boards Chameleon96 board
>
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> arch/arm/boot/dts/Makefile | 1 +
> .../boot/dts/socfpga_cyclone5_chameleon96.dts | 130 ++++++++++++++++++
> 3 files changed, 132 insertions(+)
> create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/2] Add board support for Chameleon96 Board
2019-01-08 6:43 ` Manivannan Sadhasivam
@ 2019-01-09 16:09 ` Dinh Nguyen
-1 siblings, 0 replies; 13+ messages in thread
From: Dinh Nguyen @ 2019-01-09 16:09 UTC (permalink / raw)
To: Manivannan Sadhasivam, robh+dt
Cc: devicetree, linux-kernel, amit.kucheria, nazik, yossi,
linux-arm-kernel
On 1/8/19 12:43 AM, Manivannan Sadhasivam wrote:
> On Sat, Dec 15, 2018 at 08:31:50AM +0530, Manivannan Sadhasivam wrote:
>> Hello,
>>
>> This patchset adds board support for Chameleon96 board from Novetech
>> based on Intel Cyclone V SoC FPGA. This board is one of the Consumer
>> Edition boards of the 96Boards family and has the following key features:
>>
>> * SoC - Intel Cyclone V SoC FPGA
>> * GPU - Graphics based on Intel Video Suite for FPGA
>> * RAM - 512MB DDR3L
>> * USB - 2x USB2.0 Host, 1x USB2.0 OTG
>> * Wireless - Wifi, BT
>>
>> More information about this board can be found in 96Boards product
>> page: https://www.96boards.org/product/chameleon96/
>>
>> This patchset has been tested on Chameleon96 board and the board boots
>> into a distro on SD card with USB ports working.
>>
>
> Hi,
>
> Ping on this series!
>
Applied!
Thanks,
Dinh
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/2] Add board support for Chameleon96 Board
@ 2019-01-09 16:09 ` Dinh Nguyen
0 siblings, 0 replies; 13+ messages in thread
From: Dinh Nguyen @ 2019-01-09 16:09 UTC (permalink / raw)
To: Manivannan Sadhasivam, robh+dt
Cc: devicetree, linux-kernel, linux-arm-kernel, amit.kucheria, yossi,
nazik
On 1/8/19 12:43 AM, Manivannan Sadhasivam wrote:
> On Sat, Dec 15, 2018 at 08:31:50AM +0530, Manivannan Sadhasivam wrote:
>> Hello,
>>
>> This patchset adds board support for Chameleon96 board from Novetech
>> based on Intel Cyclone V SoC FPGA. This board is one of the Consumer
>> Edition boards of the 96Boards family and has the following key features:
>>
>> * SoC - Intel Cyclone V SoC FPGA
>> * GPU - Graphics based on Intel Video Suite for FPGA
>> * RAM - 512MB DDR3L
>> * USB - 2x USB2.0 Host, 1x USB2.0 OTG
>> * Wireless - Wifi, BT
>>
>> More information about this board can be found in 96Boards product
>> page: https://www.96boards.org/product/chameleon96/
>>
>> This patchset has been tested on Chameleon96 board and the board boots
>> into a distro on SD card with USB ports working.
>>
>
> Hi,
>
> Ping on this series!
>
Applied!
Thanks,
Dinh
^ permalink raw reply [flat|nested] 13+ messages in thread