From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com,
maarten.lankhorst@intel.com
Subject: Re: [v4 1/4] drm/i915: Remove gamma_mode state variable
Date: Fri, 21 Dec 2018 19:27:17 +0200 [thread overview]
Message-ID: <20181221172717.GI20097@intel.com> (raw)
In-Reply-To: <1545335981-2338-2-git-send-email-uma.shankar@intel.com>
On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
> Removed crtc state variable for gamma mode as it's redundant
> since currently we have fixed modes on respective hardware
> platforms. This was making this state variable irrelevant.
I'm going to add it back at some point.
>
> Credits-to: Matt Roper <matthew.d.roper@intel.com>
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/i915/intel_color.c | 5 +----
> drivers/gpu/drm/i915/intel_display.c | 3 ---
> drivers/gpu/drm/i915/intel_drv.h | 3 ---
> 3 files changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index 37fd9dd..f32e4a7 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state *crtc_state)
> * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
> */
> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
> - (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> + (I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_SPLIT)) {
> hsw_disable_ips(crtc_state);
> reenable_ips = true;
> }
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>
> i9xx_load_luts(crtc_state);
> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state *crtc_state)
> bdw_load_gamma_lut(crtc_state,
> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
> POSTING_READ(GAMMA_MODE(pipe));
>
> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state *crtc_state)
>
> bdw_load_gamma_lut(crtc_state, 0);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
> POSTING_READ(GAMMA_MODE(pipe));
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 3b70948..704d9d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> intel_get_pipe_src_size(crtc, pipe_config);
> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>
> - pipe_config->gamma_mode =
> - I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
> -
> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
> power_domain_mask |= BIT_ULL(power_domain);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 1028af8..7427a36 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>
> struct intel_crtc_wm_state wm;
>
> - /* Gamma mode programmed on the pipe */
> - uint32_t gamma_mode;
> -
> /* bitmask of visible planes (enum plane_id) */
> u8 active_planes;
> u8 nv12_planes;
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-12-21 17:27 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-20 19:59 [v4 0/4] Add support for Gen 11 pipe color features Uma Shankar
2018-12-20 19:59 ` [v4 1/4] drm/i915: Remove gamma_mode state variable Uma Shankar
2018-12-21 1:24 ` Matt Roper
2018-12-27 10:14 ` Shankar, Uma
2018-12-21 17:27 ` Ville Syrjälä [this message]
2018-12-27 10:15 ` Shankar, Uma
2018-12-20 19:59 ` [v4 2/4] drm/i915/icl: Add icl pipe degamma and gamma support Uma Shankar
2018-12-21 1:24 ` Matt Roper
2018-12-27 13:17 ` Shankar, Uma
2018-12-21 17:38 ` Ville Syrjälä
2018-12-27 13:02 ` Shankar, Uma
2018-12-27 8:18 ` Jani Nikula
2018-12-20 19:59 ` [v4 3/4] drm/i915/icl: Enable ICL Pipe CSC block Uma Shankar
2018-12-21 17:31 ` Ville Syrjälä
2018-12-27 14:17 ` Shankar, Uma
2018-12-20 19:59 ` [v4 4/4] drm/i915/icl: Add degamma and gamma lut size to gen11 caps Uma Shankar
2018-12-20 20:23 ` ✓ Fi.CI.BAT: success for Add support for Gen 11 pipe color features (rev4) Patchwork
2018-12-21 17:57 ` ✗ Fi.CI.IGT: failure " Patchwork
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