Re: [Qemu-devel][PATCH 2/4] Add CET SHSTK and IBT CPUID feature-word definitions.

[Yang Weijiang <weijiang.yang@intel.com>]

On Fri, Dec 28, 2018 at 03:25:10PM +0100, Paolo Bonzini wrote:
Thanks a lot Paolo for the comments!

I'll fix the issue in next version.

> On 26/12/18 09:25, Yang Weijiang wrote:
> > @@ -1233,6 +1252,14 @@ static const ExtSaveArea x86_ext_save_areas[] = {
> >            { .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU,
> >              .offset = offsetof(X86XSaveArea, pkru_state),
> >              .size = sizeof(XSavePKRU) },
> > +    [XSTATE_CET_U_BIT] = {
> > +            .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_CET_SHSTK,
> > +            .offset = offsetof(X86XSaveArea, cet_u),
> 
> These offsets are incorrect, since supervisor states are only stored in
> the compacted format.  In fact, in patch 4, supervisor states should
> return 0 in CPUID(EAX=0Dh,ECX=n).EBX.
> 
> You can use offset == 0 to distinguish supervisor and user states, so
> that supervisor states are skipped in xsave_area_size and x86_cpu_reset.
> 
> Thanks,
> 
> Paolo
> 
> > +            .size = sizeof(XSaveCETU) },
> > +    [XSTATE_CET_S_BIT] = {
> > +            .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_CET_SHSTK,
> > +            .offset = offsetof(X86XSaveArea, cet_s),
> > +            .size = sizeof(XSaveCETS) },
> >  };
> >  
> >  static uint32_t xsave_area_size(uint64_t mask)