* ARM: dts: ls1021a: Add memory controller
@ 2018-12-11 15:48 ` Patrick Havelange
0 siblings, 0 replies; 7+ messages in thread
From: Patrick Havelange @ 2018-12-11 15:48 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel,
devicetree, linux-kernel, Borislav Petkov, Mauro Carvalho Chehab,
linux-edac
Cc: arnout.vandecappelle, patrick.havelange, matthew.weber
The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66a79ad..a877c32bff20 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -125,6 +125,13 @@
interrupt-parent = <&gic>;
ranges;
+ ddr: memory-controller@1080000 {
+ compatible = "fsl,qoriq-memory-controller";
+ reg = <0x0 0x1080000 0x0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
+
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] ARM: dts: ls1021a: Add memory controller
@ 2018-12-11 15:48 ` Patrick Havelange
0 siblings, 0 replies; 7+ messages in thread
From: Patrick Havelange @ 2018-12-11 15:48 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel,
devicetree, linux-kernel, Borislav Petkov, Mauro Carvalho Chehab,
linux-edac
Cc: matthew.weber, patrick.havelange, arnout.vandecappelle
The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66a79ad..a877c32bff20 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -125,6 +125,13 @@
interrupt-parent = <&gic>;
ranges;
+ ddr: memory-controller@1080000 {
+ compatible = "fsl,qoriq-memory-controller";
+ reg = <0x0 0x1080000 0x0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
+
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] ARM: dts: ls1021a: Add memory controller
@ 2018-12-11 15:48 ` Patrick Havelange
0 siblings, 0 replies; 7+ messages in thread
From: Patrick Havelange @ 2018-12-11 15:48 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel,
devicetree, linux-kernel, Borislav Petkov, Mauro Carvalho Chehab,
linux-edac
Cc: matthew.weber, patrick.havelange, arnout.vandecappelle
The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66a79ad..a877c32bff20 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -125,6 +125,13 @@
interrupt-parent = <&gic>;
ranges;
+ ddr: memory-controller@1080000 {
+ compatible = "fsl,qoriq-memory-controller";
+ reg = <0x0 0x1080000 0x0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
+
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] ARM: dts: ls1021a: Add memory controller
@ 2018-12-11 15:48 ` Patrick Havelange
0 siblings, 0 replies; 7+ messages in thread
From: Patrick Havelange @ 2018-12-11 15:48 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel,
devicetree, linux-kernel, Borislav Petkov, Mauro Carvalho Chehab,
linux-edac
Cc: arnout.vandecappelle, patrick.havelange, matthew.weber
The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66a79ad..a877c32bff20 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -125,6 +125,13 @@
interrupt-parent = <&gic>;
ranges;
+ ddr: memory-controller@1080000 {
+ compatible = "fsl,qoriq-memory-controller";
+ reg = <0x0 0x1080000 0x0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
+
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ARM: dts: ls1021a: Add memory controller
2018-12-11 15:48 ` Patrick Havelange
(?)
@ 2019-01-10 7:03 ` Shawn Guo
-1 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2019-01-10 7:03 UTC (permalink / raw)
To: Patrick Havelange
Cc: Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel, devicetree,
linux-kernel, Borislav Petkov, Mauro Carvalho Chehab, linux-edac,
arnout.vandecappelle, matthew.weber
On Tue, Dec 11, 2018 at 04:48:34PM +0100, Patrick Havelange wrote:
> The LS1021A has a memory controller that supports EDAC. This commit
> adds an entry for it.
>
> Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] ARM: dts: ls1021a: Add memory controller
@ 2019-01-10 7:03 ` Shawn Guo
0 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2019-01-10 7:03 UTC (permalink / raw)
To: Patrick Havelange
Cc: Mark Rutland, devicetree, arnout.vandecappelle, matthew.weber,
linux-kernel, Li Yang, Rob Herring, Borislav Petkov,
Mauro Carvalho Chehab, linux-arm-kernel, linux-edac
On Tue, Dec 11, 2018 at 04:48:34PM +0100, Patrick Havelange wrote:
> The LS1021A has a memory controller that supports EDAC. This commit
> adds an entry for it.
>
> Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Applied, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] ARM: dts: ls1021a: Add memory controller
@ 2019-01-10 7:03 ` Shawn Guo
0 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2019-01-10 7:03 UTC (permalink / raw)
To: Patrick Havelange
Cc: Li Yang, Rob Herring, Mark Rutland, linux-arm-kernel, devicetree,
linux-kernel, Borislav Petkov, Mauro Carvalho Chehab, linux-edac,
arnout.vandecappelle, matthew.weber
On Tue, Dec 11, 2018 at 04:48:34PM +0100, Patrick Havelange wrote:
> The LS1021A has a memory controller that supports EDAC. This commit
> adds an entry for it.
>
> Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-01-10 7:04 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2019-01-10 7:03 ARM: dts: ls1021a: Add memory controller Shawn Guo
2019-01-10 7:03 ` [PATCH] " Shawn Guo
2019-01-10 7:03 ` Shawn Guo
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2018-12-11 15:48 Patrick Havelange
2018-12-11 15:48 ` [PATCH] " Patrick Havelange
2018-12-11 15:48 ` Patrick Havelange
2018-12-11 15:48 ` Patrick Havelange
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