From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Boris Brezillon <bbrezillon@kernel.org>,
Mathieu Malaterre <malat@debian.org>,
Richard Weinberger <richard@nod.at>,
linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org,
Harvey Hunt <harveyhuntnexus@gmail.com>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH v3 8/9] mtd: rawnand: ingenic: Add support for the JZ4725B
Date: Tue, 5 Feb 2019 19:54:57 +0100 [thread overview]
Message-ID: <20190205195457.171cd3e3@xps13> (raw)
In-Reply-To: <1549384157.1610.0@crapouillou.net>
Hi Paul,
[...]
> >> +
> >> +static void jz4725b_bch_init(struct ingenic_ecc *bch,
> >> + struct ingenic_ecc_params *params, bool encode)
> >
> > I don't know the IP but 'encode' looks strange, what is it supposed to
> > mean?
>
> It is used to toggle between calculating the ECC codes for a given set of data,
> and using supplied ECC codes to verify a set of data.
>
> I just reused the function and parameter names that were used in the
> jz4780-bch driver, that's where the 'encode' comes from.
I see, so it is kind of a "derive" vs. "verify" information. Please
add a comment explaining the parameter name then.
> >> +{
> >> + u32 reg;
> >> +
> >> + /* Clear interrupt status. */
> >> + writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
> >> +
> >> + /* Initialise and enable BCH. */
> >> + writel(0x1f, bch->base + BCH_BHCCR);
> >> + writel(BCH_BHCR_BCHE, bch->base + BCH_BHCSR);
> >> +
> >> + if (params->strength == 8)
> >> + writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCSR);
> >> + else
> >> + writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCCR);
> >
> > Here you write to BCH_BHCSR or BCH_BHCCR depending on
> > params->strength...
> >
> >> +
> >> + if (encode)
> >> + writel(BCH_BHCR_ENCE, bch->base + BCH_BHCSR);
> >> + else
> >> + writel(BCH_BHCR_ENCE, bch->base + BCH_BHCCR);
> >
> > ...and here depending on encode.
> >
> > Can you explain a bit?
>
> BCH_BHCSR / BCH_BHCCR are set and clear registers for the BCH_BHCR
> register, which is itself read-only. The BSEL field is used to toggle
> between a strength of 4 (if cleared) and 8 (if set), while the ENCE
> field configures the IP for 'encoding' mode.
All clear. Can you add a short comment to explain it somewhere?
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Harvey Hunt <harveyhuntnexus@gmail.com>,
Mathieu Malaterre <malat@debian.org>,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 8/9] mtd: rawnand: ingenic: Add support for the JZ4725B
Date: Tue, 5 Feb 2019 19:54:57 +0100 [thread overview]
Message-ID: <20190205195457.171cd3e3@xps13> (raw)
In-Reply-To: <1549384157.1610.0@crapouillou.net>
Hi Paul,
[...]
> >> +
> >> +static void jz4725b_bch_init(struct ingenic_ecc *bch,
> >> + struct ingenic_ecc_params *params, bool encode)
> >
> > I don't know the IP but 'encode' looks strange, what is it supposed to
> > mean?
>
> It is used to toggle between calculating the ECC codes for a given set of data,
> and using supplied ECC codes to verify a set of data.
>
> I just reused the function and parameter names that were used in the
> jz4780-bch driver, that's where the 'encode' comes from.
I see, so it is kind of a "derive" vs. "verify" information. Please
add a comment explaining the parameter name then.
> >> +{
> >> + u32 reg;
> >> +
> >> + /* Clear interrupt status. */
> >> + writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
> >> +
> >> + /* Initialise and enable BCH. */
> >> + writel(0x1f, bch->base + BCH_BHCCR);
> >> + writel(BCH_BHCR_BCHE, bch->base + BCH_BHCSR);
> >> +
> >> + if (params->strength == 8)
> >> + writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCSR);
> >> + else
> >> + writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCCR);
> >
> > Here you write to BCH_BHCSR or BCH_BHCCR depending on
> > params->strength...
> >
> >> +
> >> + if (encode)
> >> + writel(BCH_BHCR_ENCE, bch->base + BCH_BHCSR);
> >> + else
> >> + writel(BCH_BHCR_ENCE, bch->base + BCH_BHCCR);
> >
> > ...and here depending on encode.
> >
> > Can you explain a bit?
>
> BCH_BHCSR / BCH_BHCCR are set and clear registers for the BCH_BHCR
> register, which is itself read-only. The BSEL field is used to toggle
> between a strength of 4 (if cleared) and 8 (if set), while the ENCE
> field configures the IP for 'encoding' mode.
All clear. Can you add a short comment to explain it somewhere?
Thanks,
Miquèl
next prev parent reply other threads:[~2019-02-05 18:55 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-04 19:04 [PATCH v3 1/9] dt-bindings: mtd: ingenic: Add compatible strings for JZ4740 and JZ4725B Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 2/9] dt-bindings: mtd: ingenic: Change 'BCH' to 'ECC' in documentation Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 3/9] mtd: rawnand: Move drivers for Ingenic SoCs to subfolder Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 4/9] mtd: rawnand: ingenic: Use SPDX license notifiers Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 5/9] mtd: rawnand: ingenic: Rename jz4780_nand driver to ingenic_nand Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 6/9] mtd: rawnand: ingenic: Separate top-level and SoC specific code Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-04 19:04 ` [PATCH v3 7/9] mtd: rawnand: ingenic: Add support for the JZ4740 Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-05 13:54 ` Miquel Raynal
2019-02-05 13:54 ` Miquel Raynal
2019-02-04 19:04 ` [PATCH v3 8/9] mtd: rawnand: ingenic: Add support for the JZ4725B Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
2019-02-05 14:12 ` Miquel Raynal
2019-02-05 14:12 ` Miquel Raynal
2019-02-05 16:29 ` Paul Cercueil
2019-02-05 16:29 ` Paul Cercueil
2019-02-05 18:54 ` Miquel Raynal [this message]
2019-02-05 18:54 ` Miquel Raynal
2019-02-04 19:04 ` [PATCH v3 9/9] mtd: rawnand: ingenic: Add ooblayout for the Qi Ben Nanonote Paul Cercueil
2019-02-04 19:04 ` Paul Cercueil
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