From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Chen-Yu Tsai <wens@csie.org>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Jagan Teki <jagan@amarulasolutions.com>,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-amarula@amarulasolutions.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 2/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Fri, 15 Feb 2019 00:55:38 +0530 [thread overview]
Message-ID: <20190214192544.7314-3-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190214192544.7314-1-jagan@amarulasolutions.com>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the hbp value accordingly in sun6i_dsi_setup_timings.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index d70a8c43a4b8..982ae6b17654 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -472,7 +472,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Chen-Yu Tsai <wens@csie.org>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Jagan Teki <jagan@amarulasolutions.com>,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-amarula@amarulasolutions.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 2/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Fri, 15 Feb 2019 00:55:38 +0530 [thread overview]
Message-ID: <20190214192544.7314-3-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190214192544.7314-1-jagan@amarulasolutions.com>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the hbp value accordingly in sun6i_dsi_setup_timings.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index d70a8c43a4b8..982ae6b17654 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -472,7 +472,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Chen-Yu Tsai <wens@csie.org>
Cc: dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com,
Michael Trimarchi <michael@amarulasolutions.com>,
Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v8 2/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Fri, 15 Feb 2019 00:55:38 +0530 [thread overview]
Message-ID: <20190214192544.7314-3-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190214192544.7314-1-jagan@amarulasolutions.com>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the hbp value accordingly in sun6i_dsi_setup_timings.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index d70a8c43a4b8..982ae6b17654 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -472,7 +472,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
next prev parent reply other threads:[~2019-02-14 19:26 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 19:25 [PATCH v8 0/8] drm/sun4i: sun6i_mipi_dsi: Random fixes Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 1/8] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki [this message]
2019-02-14 19:25 ` [PATCH v8 2/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 3/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hfp " Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 4/8] drm/sun4i: sun6i_mipi_dsi: Fix DSI hblk timing calculation Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 5/8] drm/sun4i: sun6i_mipi_dsi: Add DSI hblk packet overhead Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 6/8] drm/sun4i: sun6i_mipi_dsi: Set proper vblk timing calculation Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 7/8] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-15 19:37 ` Jagan Teki
2019-02-15 19:37 ` Jagan Teki
2019-02-14 19:25 ` [PATCH v8 8/8] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2019-02-14 19:25 ` Jagan Teki
2019-02-14 19:25 ` Jagan Teki
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