From: Igor Mammedov <imammedo@redhat.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: peter.maydell@linaro.org, drjones@redhat.com, david@redhat.com,
qemu-devel@nongnu.org, shameerali.kolothum.thodi@huawei.com,
dgilbert@redhat.com, qemu-arm@nongnu.org,
david@gibson.dropbear.id.au, eric.auger.pro@gmail.com
Subject: Re: [Qemu-arm] [PATCH v7 02/17] hw/arm/virt: Rename highmem IO regions
Date: Thu, 21 Feb 2019 16:05:34 +0100 [thread overview]
Message-ID: <20190221160534.183636e0@redhat.com> (raw)
In-Reply-To: <20190220224003.4420-3-eric.auger@redhat.com>
On Wed, 20 Feb 2019 23:39:48 +0100
Eric Auger <eric.auger@redhat.com> wrote:
> In preparation for a split of the memory map into a static
> part and a dynamic part floating after the RAM, let's rename the
> regions located after the RAM
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
with indent and checkpatch warnings fixed
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
> v7: added Peter's R-b
> v6: creation
> ---
> hw/arm/virt-acpi-build.c | 8 ++++----
> hw/arm/virt.c | 21 +++++++++++----------
> include/hw/arm/virt.h | 8 ++++----
> 3 files changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c714d..829d2f0035 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> size_pio));
>
> if (use_highmem) {
> - hwaddr base_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].base;
> - hwaddr size_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].size;
> + hwaddr base_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].base;
> + hwaddr size_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].size;
>
> aml_append(rbuf,
> aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
> @@ -663,8 +663,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> gicr = acpi_data_push(table_data, sizeof(*gicr));
> gicr->type = ACPI_APIC_GENERIC_REDISTRIBUTOR;
> gicr->length = sizeof(*gicr);
> - gicr->base_address = cpu_to_le64(memmap[VIRT_GIC_REDIST2].base);
> - gicr->range_length = cpu_to_le32(memmap[VIRT_GIC_REDIST2].size);
> + gicr->base_address = cpu_to_le64(memmap[VIRT_HIGH_GIC_REDIST2].base);
> + gicr->range_length = cpu_to_le32(memmap[VIRT_HIGH_GIC_REDIST2].size);
> }
>
> if (its_class_name() && !vmc->no_its) {
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 99c2b6e60d..a1955e7764 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -150,10 +150,10 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
> [VIRT_MEM] = { 0x40000000, RAMLIMIT_BYTES },
> /* Additional 64 MB redist region (can contain up to 512 redistributors) */
> - [VIRT_GIC_REDIST2] = { 0x4000000000ULL, 0x4000000 },
> - [VIRT_PCIE_ECAM_HIGH] = { 0x4010000000ULL, 0x10000000 },
> + [VIRT_HIGH_GIC_REDIST2] = { 0x4000000000ULL, 0x4000000 },
> + [VIRT_HIGH_PCIE_ECAM] = { 0x4010000000ULL, 0x10000000 },
> /* Second PCIe window, 512GB wide at the 512GB boundary */
> - [VIRT_PCIE_MMIO_HIGH] = { 0x8000000000ULL, 0x8000000000ULL },
> + [VIRT_HIGH_PCIE_MMIO] = { 0x8000000000ULL, 0x8000000000ULL },
> };
>
> static const int a15irqmap[] = {
> @@ -435,8 +435,8 @@ static void fdt_add_gic_node(VirtMachineState *vms)
> 2, vms->memmap[VIRT_GIC_DIST].size,
> 2, vms->memmap[VIRT_GIC_REDIST].base,
> 2, vms->memmap[VIRT_GIC_REDIST].size,
> - 2, vms->memmap[VIRT_GIC_REDIST2].base,
> - 2, vms->memmap[VIRT_GIC_REDIST2].size);
> + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].base,
> + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].size);
> }
>
> if (vms->virt) {
> @@ -584,7 +584,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
>
> if (nb_redist_regions == 2) {
> uint32_t redist1_capacity =
> - vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
is indent correct here (it didn't look correct to begin with).
Strangle checkpatch didn't complain about it, but since I've run it
does complain about a bunch of "line over 80 characters" on this patch
>
> qdev_prop_set_uint32(gicdev, "redist-region-count[1]",
> MIN(smp_cpus - redist0_count, redist1_capacity));
> @@ -601,7 +601,8 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
> if (type == 3) {
> sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
> if (nb_redist_regions == 2) {
> - sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].base);
> + sysbus_mmio_map(gicbusdev, 2,
> + vms->memmap[VIRT_HIGH_GIC_REDIST2].base);
> }
> } else {
> sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base);
> @@ -1088,8 +1089,8 @@ static void create_pcie(VirtMachineState *vms, qemu_irq *pic)
> {
> hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;
> hwaddr size_mmio = vms->memmap[VIRT_PCIE_MMIO].size;
> - hwaddr base_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].base;
> - hwaddr size_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].size;
> + hwaddr base_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].base;
> + hwaddr size_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].size;
> hwaddr base_pio = vms->memmap[VIRT_PCIE_PIO].base;
> hwaddr size_pio = vms->memmap[VIRT_PCIE_PIO].size;
> hwaddr base_ecam, size_ecam;
> @@ -1418,7 +1419,7 @@ static void machvirt_init(MachineState *machine)
> */
> if (vms->gic_version == 3) {
> virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
> - virt_max_cpus += vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> + virt_max_cpus += vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> } else {
> virt_max_cpus = GIC_NCPU;
> }
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 4cc57a7ef6..a27086d524 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -64,7 +64,7 @@ enum {
> VIRT_GIC_VCPU,
> VIRT_GIC_ITS,
> VIRT_GIC_REDIST,
> - VIRT_GIC_REDIST2,
> + VIRT_HIGH_GIC_REDIST2,
> VIRT_SMMU,
> VIRT_UART,
> VIRT_MMIO,
> @@ -74,9 +74,9 @@ enum {
> VIRT_PCIE_MMIO,
> VIRT_PCIE_PIO,
> VIRT_PCIE_ECAM,
> - VIRT_PCIE_ECAM_HIGH,
> + VIRT_HIGH_PCIE_ECAM,
> VIRT_PLATFORM_BUS,
> - VIRT_PCIE_MMIO_HIGH,
> + VIRT_HIGH_PCIE_MMIO,
> VIRT_GPIO,
> VIRT_SECURE_UART,
> VIRT_SECURE_MEM,
> @@ -128,7 +128,7 @@ typedef struct {
> int psci_conduit;
> } VirtMachineState;
>
> -#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM)
> +#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
>
> #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
> #define VIRT_MACHINE(obj) \
WARNING: multiple messages have this Message-ID (diff)
From: Igor Mammedov <imammedo@redhat.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: eric.auger.pro@gmail.com, qemu-devel@nongnu.org,
qemu-arm@nongnu.org, peter.maydell@linaro.org,
shameerali.kolothum.thodi@huawei.com, david@redhat.com,
dgilbert@redhat.com, david@gibson.dropbear.id.au,
drjones@redhat.com
Subject: Re: [Qemu-devel] [PATCH v7 02/17] hw/arm/virt: Rename highmem IO regions
Date: Thu, 21 Feb 2019 16:05:34 +0100 [thread overview]
Message-ID: <20190221160534.183636e0@redhat.com> (raw)
In-Reply-To: <20190220224003.4420-3-eric.auger@redhat.com>
On Wed, 20 Feb 2019 23:39:48 +0100
Eric Auger <eric.auger@redhat.com> wrote:
> In preparation for a split of the memory map into a static
> part and a dynamic part floating after the RAM, let's rename the
> regions located after the RAM
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
with indent and checkpatch warnings fixed
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
> v7: added Peter's R-b
> v6: creation
> ---
> hw/arm/virt-acpi-build.c | 8 ++++----
> hw/arm/virt.c | 21 +++++++++++----------
> include/hw/arm/virt.h | 8 ++++----
> 3 files changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c714d..829d2f0035 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> size_pio));
>
> if (use_highmem) {
> - hwaddr base_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].base;
> - hwaddr size_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].size;
> + hwaddr base_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].base;
> + hwaddr size_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].size;
>
> aml_append(rbuf,
> aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
> @@ -663,8 +663,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> gicr = acpi_data_push(table_data, sizeof(*gicr));
> gicr->type = ACPI_APIC_GENERIC_REDISTRIBUTOR;
> gicr->length = sizeof(*gicr);
> - gicr->base_address = cpu_to_le64(memmap[VIRT_GIC_REDIST2].base);
> - gicr->range_length = cpu_to_le32(memmap[VIRT_GIC_REDIST2].size);
> + gicr->base_address = cpu_to_le64(memmap[VIRT_HIGH_GIC_REDIST2].base);
> + gicr->range_length = cpu_to_le32(memmap[VIRT_HIGH_GIC_REDIST2].size);
> }
>
> if (its_class_name() && !vmc->no_its) {
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 99c2b6e60d..a1955e7764 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -150,10 +150,10 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
> [VIRT_MEM] = { 0x40000000, RAMLIMIT_BYTES },
> /* Additional 64 MB redist region (can contain up to 512 redistributors) */
> - [VIRT_GIC_REDIST2] = { 0x4000000000ULL, 0x4000000 },
> - [VIRT_PCIE_ECAM_HIGH] = { 0x4010000000ULL, 0x10000000 },
> + [VIRT_HIGH_GIC_REDIST2] = { 0x4000000000ULL, 0x4000000 },
> + [VIRT_HIGH_PCIE_ECAM] = { 0x4010000000ULL, 0x10000000 },
> /* Second PCIe window, 512GB wide at the 512GB boundary */
> - [VIRT_PCIE_MMIO_HIGH] = { 0x8000000000ULL, 0x8000000000ULL },
> + [VIRT_HIGH_PCIE_MMIO] = { 0x8000000000ULL, 0x8000000000ULL },
> };
>
> static const int a15irqmap[] = {
> @@ -435,8 +435,8 @@ static void fdt_add_gic_node(VirtMachineState *vms)
> 2, vms->memmap[VIRT_GIC_DIST].size,
> 2, vms->memmap[VIRT_GIC_REDIST].base,
> 2, vms->memmap[VIRT_GIC_REDIST].size,
> - 2, vms->memmap[VIRT_GIC_REDIST2].base,
> - 2, vms->memmap[VIRT_GIC_REDIST2].size);
> + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].base,
> + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].size);
> }
>
> if (vms->virt) {
> @@ -584,7 +584,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
>
> if (nb_redist_regions == 2) {
> uint32_t redist1_capacity =
> - vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
is indent correct here (it didn't look correct to begin with).
Strangle checkpatch didn't complain about it, but since I've run it
does complain about a bunch of "line over 80 characters" on this patch
>
> qdev_prop_set_uint32(gicdev, "redist-region-count[1]",
> MIN(smp_cpus - redist0_count, redist1_capacity));
> @@ -601,7 +601,8 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
> if (type == 3) {
> sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
> if (nb_redist_regions == 2) {
> - sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].base);
> + sysbus_mmio_map(gicbusdev, 2,
> + vms->memmap[VIRT_HIGH_GIC_REDIST2].base);
> }
> } else {
> sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base);
> @@ -1088,8 +1089,8 @@ static void create_pcie(VirtMachineState *vms, qemu_irq *pic)
> {
> hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;
> hwaddr size_mmio = vms->memmap[VIRT_PCIE_MMIO].size;
> - hwaddr base_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].base;
> - hwaddr size_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].size;
> + hwaddr base_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].base;
> + hwaddr size_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].size;
> hwaddr base_pio = vms->memmap[VIRT_PCIE_PIO].base;
> hwaddr size_pio = vms->memmap[VIRT_PCIE_PIO].size;
> hwaddr base_ecam, size_ecam;
> @@ -1418,7 +1419,7 @@ static void machvirt_init(MachineState *machine)
> */
> if (vms->gic_version == 3) {
> virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
> - virt_max_cpus += vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> + virt_max_cpus += vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
> } else {
> virt_max_cpus = GIC_NCPU;
> }
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 4cc57a7ef6..a27086d524 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -64,7 +64,7 @@ enum {
> VIRT_GIC_VCPU,
> VIRT_GIC_ITS,
> VIRT_GIC_REDIST,
> - VIRT_GIC_REDIST2,
> + VIRT_HIGH_GIC_REDIST2,
> VIRT_SMMU,
> VIRT_UART,
> VIRT_MMIO,
> @@ -74,9 +74,9 @@ enum {
> VIRT_PCIE_MMIO,
> VIRT_PCIE_PIO,
> VIRT_PCIE_ECAM,
> - VIRT_PCIE_ECAM_HIGH,
> + VIRT_HIGH_PCIE_ECAM,
> VIRT_PLATFORM_BUS,
> - VIRT_PCIE_MMIO_HIGH,
> + VIRT_HIGH_PCIE_MMIO,
> VIRT_GPIO,
> VIRT_SECURE_UART,
> VIRT_SECURE_MEM,
> @@ -128,7 +128,7 @@ typedef struct {
> int psci_conduit;
> } VirtMachineState;
>
> -#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM)
> +#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
>
> #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
> #define VIRT_MACHINE(obj) \
next prev parent reply other threads:[~2019-02-21 15:07 UTC|newest]
Thread overview: 125+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-20 22:39 [Qemu-arm] [PATCH v7 00/17] ARM virt: Initial RAM expansion and PCDIMM/NVDIMM support Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 01/17] hw/arm/boot: introduce fdt_add_memory_node helper Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-21 14:58 ` [Qemu-arm] " Igor Mammedov
2019-02-21 14:58 ` [Qemu-devel] " Igor Mammedov
2019-02-20 22:39 ` [Qemu-devel] [PATCH v7 02/17] hw/arm/virt: Rename highmem IO regions Eric Auger
2019-02-20 22:39 ` Eric Auger
2019-02-21 15:05 ` Igor Mammedov [this message]
2019-02-21 15:05 ` Igor Mammedov
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 03/17] hw/arm/virt: Split the memory map description Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-21 16:19 ` Igor Mammedov
2019-02-21 16:19 ` Igor Mammedov
2019-02-21 17:21 ` [Qemu-arm] " Auger Eric
2019-02-21 17:21 ` Auger Eric
2019-02-22 10:15 ` [Qemu-arm] " Igor Mammedov
2019-02-22 10:15 ` Igor Mammedov
2019-02-22 14:28 ` [Qemu-arm] " Auger Eric
2019-02-22 14:28 ` Auger Eric
2019-02-22 14:51 ` Igor Mammedov
2019-02-22 14:51 ` Igor Mammedov
2019-02-22 7:34 ` Heyi Guo
2019-02-22 7:34 ` Heyi Guo
2019-02-22 8:08 ` Auger Eric
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 04/17] hw/boards: Add a MachineState parameter to kvm_type callback Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-22 10:18 ` [Qemu-arm] " Igor Mammedov
2019-02-22 10:18 ` [Qemu-devel] " Igor Mammedov
2019-02-20 22:39 ` [Qemu-devel] [PATCH v7 05/17] kvm: add kvm_arm_get_max_vm_ipa_size Eric Auger
2019-02-20 22:39 ` Eric Auger
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 06/17] vl: Set machine ram_size, maxram_size and ram_slots earlier Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-22 10:40 ` [Qemu-arm] " Igor Mammedov
2019-02-22 10:40 ` [Qemu-devel] " Igor Mammedov
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 07/17] hw/arm/virt: Dynamic memory map depending on RAM requirements Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-22 12:57 ` [Qemu-arm] " Igor Mammedov
2019-02-22 12:57 ` [Qemu-devel] " Igor Mammedov
2019-02-22 14:06 ` [Qemu-arm] " Auger Eric
2019-02-22 14:06 ` [Qemu-devel] " Auger Eric
2019-02-22 14:23 ` [Qemu-arm] " Igor Mammedov
2019-02-22 14:23 ` [Qemu-devel] " Igor Mammedov
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 08/17] hw/arm/virt: Implement kvm_type function for 4.0 machine Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-22 12:45 ` [Qemu-arm] " Igor Mammedov
2019-02-22 12:45 ` [Qemu-devel] " Igor Mammedov
2019-02-22 14:01 ` Auger Eric
2019-02-22 14:01 ` Auger Eric
2019-02-22 14:39 ` [Qemu-arm] " Igor Mammedov
2019-02-22 14:39 ` Igor Mammedov
2019-02-22 14:53 ` Auger Eric
2019-02-22 14:53 ` Auger Eric
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 09/17] hw/arm/virt: Bump the 255GB initial RAM limit Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-20 22:39 ` [Qemu-devel] [PATCH v7 10/17] hw/arm/virt: Add memory hotplug framework Eric Auger
2019-02-20 22:39 ` Eric Auger
2019-02-22 13:25 ` Igor Mammedov
2019-02-22 13:25 ` Igor Mammedov
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 11/17] hw/arm/boot: Expose the PC-DIMM nodes in the DT Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-22 13:30 ` [Qemu-arm] " Igor Mammedov
2019-02-22 13:30 ` [Qemu-devel] " Igor Mammedov
2019-02-20 22:39 ` [Qemu-arm] [PATCH v7 12/17] hw/arm/virt-acpi-build: Add PC-DIMM in SRAT Eric Auger
2019-02-20 22:39 ` [Qemu-devel] " Eric Auger
2019-02-20 22:39 ` [Qemu-devel] [PATCH v7 13/17] hw/arm/virt: Allocate device_memory Eric Auger
2019-02-20 22:39 ` Eric Auger
2019-02-22 13:48 ` [Qemu-arm] " Igor Mammedov
2019-02-22 13:48 ` [Qemu-devel] " Igor Mammedov
2019-02-22 14:15 ` [Qemu-arm] " Auger Eric
2019-02-22 14:15 ` [Qemu-devel] " Auger Eric
2019-02-22 14:58 ` Igor Mammedov
2019-02-22 14:58 ` Igor Mammedov
2019-02-20 22:40 ` [Qemu-arm] [PATCH v7 14/17] nvdimm: use configurable ACPI IO base and size Eric Auger
2019-02-20 22:40 ` [Qemu-devel] " Eric Auger
2019-02-22 15:28 ` Igor Mammedov
2019-02-22 15:28 ` Igor Mammedov
2019-02-20 22:40 ` [Qemu-devel] [PATCH v7 15/17] hw/arm/virt: Add nvdimm hot-plug infrastructure Eric Auger
2019-02-20 22:40 ` Eric Auger
2019-02-22 15:36 ` [Qemu-arm] " Igor Mammedov
2019-02-22 15:36 ` Igor Mammedov
2019-02-20 22:40 ` [Qemu-arm] [PATCH v7 16/17] hw/arm/boot: Expose the pmem nodes in the DT Eric Auger
2019-02-20 22:40 ` [Qemu-devel] " Eric Auger
2019-02-20 22:40 ` [Qemu-devel] [PATCH v7 17/17] hw/arm/virt: Add nvdimm and nvdimm-persistence options Eric Auger
2019-02-20 22:40 ` Eric Auger
2019-02-22 15:48 ` Igor Mammedov
2019-02-22 15:48 ` Igor Mammedov
2019-02-22 15:57 ` [Qemu-arm] " Auger Eric
2019-02-22 15:57 ` Auger Eric
2019-02-20 22:46 ` [Qemu-devel] [PATCH v7 00/17] ARM virt: Initial RAM expansion and PCDIMM/NVDIMM support Auger Eric
2019-02-20 22:46 ` Auger Eric
2019-02-22 16:27 ` [Qemu-arm] " Igor Mammedov
2019-02-22 16:27 ` Igor Mammedov
2019-02-22 17:35 ` [Qemu-arm] " Auger Eric
2019-02-22 17:35 ` Auger Eric
2019-02-25 9:42 ` [Qemu-arm] " Igor Mammedov
2019-02-25 9:42 ` Igor Mammedov
2019-02-25 10:13 ` [Qemu-arm] " Shameerali Kolothum Thodi
2019-02-25 10:13 ` Shameerali Kolothum Thodi
2019-02-26 8:40 ` Auger Eric
2019-02-26 8:40 ` Auger Eric
2019-02-26 13:11 ` [Qemu-arm] " Auger Eric
2019-02-26 13:11 ` Auger Eric
2019-02-26 16:56 ` [Qemu-arm] " Igor Mammedov
2019-02-26 16:56 ` Igor Mammedov
2019-02-26 17:53 ` [Qemu-arm] " Auger Eric
2019-02-26 17:53 ` Auger Eric
2019-02-27 10:10 ` [Qemu-arm] " Igor Mammedov
2019-02-27 10:10 ` Igor Mammedov
2019-02-27 10:27 ` [Qemu-arm] " Auger Eric
2019-02-27 10:27 ` Auger Eric
2019-02-27 10:41 ` [Qemu-arm] " Shameerali Kolothum Thodi
2019-02-27 10:41 ` Shameerali Kolothum Thodi
2019-02-27 17:51 ` [Qemu-arm] " Igor Mammedov
2019-02-27 17:51 ` Igor Mammedov
2019-02-28 7:48 ` [Qemu-arm] " Auger Eric
2019-02-28 7:48 ` Auger Eric
2019-02-28 14:05 ` [Qemu-arm] " Igor Mammedov
2019-02-28 14:05 ` Igor Mammedov
2019-03-01 14:18 ` Auger Eric
2019-03-01 14:18 ` Auger Eric
2019-03-01 16:33 ` [Qemu-arm] " Igor Mammedov
2019-03-01 16:33 ` Igor Mammedov
2019-03-01 17:52 ` [Qemu-arm] " Auger Eric
2019-03-01 17:52 ` Auger Eric
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