All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20190222170715.GA10237@localhost.localdomain>

diff --git a/a/1.txt b/N1/1.txt
index 4831ae6..bb4f9b5 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
-On Wed, Feb 20, 2019@06:46:11PM +0900, Takao Indoh wrote:
-> On Thu, Feb 14, 2019@08:44:48PM +0000, Elliott, Robert (Persistent Memory) wrote:
+On Wed, Feb 20, 2019 at 06:46:11PM +0900, Takao Indoh wrote:
+> On Thu, Feb 14, 2019 at 08:44:48PM +0000, Elliott, Robert (Persistent Memory) wrote:
 > > * how does this interact with an iommu, if there is one? Must the 
 > > address with bit 56 also be granted permission, or is that
 > > stripped off before any iommu comparisons?
diff --git a/a/content_digest b/N1/content_digest
index a05825e..c842403 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -4,13 +4,22 @@
  "ref\020190205143905.GG22199@localhost.localdomain\0"
  "ref\0AT5PR8401MB1169E9738C0A4754D0190F2FAB670@AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM\0"
  "ref\020190220094610.GB3559@esprimo\0"
- "From\0keith.busch@intel.com (Keith Busch)\0"
- "Subject\0[PATCH] nvme: Enable acceleration feature of A64FX processor\0"
+ "From\0Keith Busch <keith.busch@intel.com>\0"
+ "Subject\0Re: [PATCH] nvme: Enable acceleration feature of A64FX processor\0"
  "Date\0Fri, 22 Feb 2019 10:07:15 -0700\0"
+ "To\0Takao Indoh <indou.takao@fujitsu.com>\0"
+ "Cc\0Elliott"
+  Robert (Persistent Memory) <elliott@hpe.com>
+  Takao Indoh <indou.takao@jp.fujitsu.com>
+  sagi@grimberg.me <sagi@grimberg.me>
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  linux-nvme@lists.infradead.org <linux-nvme@lists.infradead.org>
+  axboe@fb.com <axboe@fb.com>
+ " hch@lst.de <hch@lst.de>\0"
  "\00:1\0"
  "b\0"
- "On Wed, Feb 20, 2019@06:46:11PM +0900, Takao Indoh wrote:\n"
- "> On Thu, Feb 14, 2019@08:44:48PM +0000, Elliott, Robert (Persistent Memory) wrote:\n"
+ "On Wed, Feb 20, 2019 at 06:46:11PM +0900, Takao Indoh wrote:\n"
+ "> On Thu, Feb 14, 2019 at 08:44:48PM +0000, Elliott, Robert (Persistent Memory) wrote:\n"
  "> > * how does this interact with an iommu, if there is one? Must the \n"
  "> > address with bit 56 also be granted permission, or is that\n"
  "> > stripped off before any iommu comparisons?\n"
@@ -23,4 +32,4 @@
  "capability as intended and not have arch specific work-arounds. I'm sure\n"
  nvme can't be the only device class you'd want this behavior.
 
-00b0eefc11f142e33737903033f8ad481f7f912cb05d0e9f4954cc8f1ff85c30
+6fa64f0b0638d784621d5590d2202a7d567fde7406e2bfcb1e3e4b9f81fef50a

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.