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From: Catalin Marinas <catalin.marinas@arm.com>
To: Xuefeng Wang <wxf.wang@hisilicon.com>
Cc: will.deacon@arm.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, guohanjun@huawei.com
Subject: Re: [PATCH] Use flush tlb last level when change protection
Date: Sun, 24 Feb 2019 11:08:56 +0000	[thread overview]
Message-ID: <20190224110855.GA26770@MBP.local> (raw)
In-Reply-To: <1550904447-45567-1-git-send-email-wxf.wang@hisilicon.com>

On Sat, Feb 23, 2019 at 02:47:27PM +0800, Xuefeng Wang wrote:
> The protection attributes are only kept in last level tlb, so
> protection changing only need invalidate last level tlb, exclude
> the PWC entries.
> 
> Signed-off-by: Xuefeng Wang <wxf.wang@hisilicon.com>
> ---
>  mm/mprotect.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/mm/mprotect.c b/mm/mprotect.c
> index 36cb358..0c4303d 100644
> --- a/mm/mprotect.c
> +++ b/mm/mprotect.c
> @@ -287,7 +287,7 @@ static unsigned long change_protection_range(struct vm_area_struct *vma,
>  
>  	/* Only flush the TLB if we actually modified any entries: */
>  	if (pages)
> -		flush_tlb_range(vma, start, end);
> +		__flush_tlb_range(vma, start, end, PAGE_SIZE, true);
>  	dec_tlb_flush_pending(mm);

You are changing a generic file to call an arm64-internal function,
breaking all the other architectures, so NAK.

Do you actually see any performance improvement?

-- 
Catalin

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WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Xuefeng Wang <wxf.wang@hisilicon.com>
Cc: will.deacon@arm.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, guohanjun@huawei.com
Subject: Re: [PATCH] Use flush tlb last level when change protection
Date: Sun, 24 Feb 2019 11:08:56 +0000	[thread overview]
Message-ID: <20190224110855.GA26770@MBP.local> (raw)
In-Reply-To: <1550904447-45567-1-git-send-email-wxf.wang@hisilicon.com>

On Sat, Feb 23, 2019 at 02:47:27PM +0800, Xuefeng Wang wrote:
> The protection attributes are only kept in last level tlb, so
> protection changing only need invalidate last level tlb, exclude
> the PWC entries.
> 
> Signed-off-by: Xuefeng Wang <wxf.wang@hisilicon.com>
> ---
>  mm/mprotect.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/mm/mprotect.c b/mm/mprotect.c
> index 36cb358..0c4303d 100644
> --- a/mm/mprotect.c
> +++ b/mm/mprotect.c
> @@ -287,7 +287,7 @@ static unsigned long change_protection_range(struct vm_area_struct *vma,
>  
>  	/* Only flush the TLB if we actually modified any entries: */
>  	if (pages)
> -		flush_tlb_range(vma, start, end);
> +		__flush_tlb_range(vma, start, end, PAGE_SIZE, true);
>  	dec_tlb_flush_pending(mm);

You are changing a generic file to call an arm64-internal function,
breaking all the other architectures, so NAK.

Do you actually see any performance improvement?

-- 
Catalin

  reply	other threads:[~2019-02-24 11:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-23  6:47 [PATCH] Use flush tlb last level when change protection Xuefeng Wang
2019-02-23  6:47 ` Xuefeng Wang
2019-02-24 11:08 ` Catalin Marinas [this message]
2019-02-24 11:08   ` Catalin Marinas
2019-02-25 14:38 ` kbuild test robot
2019-02-25 14:38   ` kbuild test robot
2019-02-25 15:02 ` kbuild test robot
2019-02-25 15:02   ` kbuild test robot

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