* [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
@ 2019-02-22 15:39 ` Harry Wentland
0 siblings, 0 replies; 7+ messages in thread
From: Harry Wentland @ 2019-02-22 15:39 UTC (permalink / raw)
To: amd-gfx; +Cc: robdclark, Harry Wentland, stable
Powerplay functions called from dm_pp_* functions tend to do a
mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
those will disable/enable preemption.
Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
sure they happen outside of kernel_fpu_begin/end.
Cc: stable@vger.kernel.org
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 2a807b9f77f7..5955634f6e27 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1348,12 +1348,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
bool res;
- kernel_fpu_begin();
-
/* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&fclks);
@@ -1372,9 +1372,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
} else
BREAK_TO_DEBUGGER();
+ kernel_fpu_end();
+
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&dcfclks);
--
2.19.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
@ 2019-02-22 15:39 ` Harry Wentland
0 siblings, 0 replies; 7+ messages in thread
From: Harry Wentland @ 2019-02-22 15:39 UTC (permalink / raw)
To: amd-gfx; +Cc: robdclark, Harry Wentland, stable
Powerplay functions called from dm_pp_* functions tend to do a
mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
those will disable/enable preemption.
Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
sure they happen outside of kernel_fpu_begin/end.
Cc: stable@vger.kernel.org
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 2a807b9f77f7..5955634f6e27 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1348,12 +1348,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
bool res;
- kernel_fpu_begin();
-
/* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&fclks);
@@ -1372,9 +1372,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
} else
BREAK_TO_DEBUGGER();
+ kernel_fpu_end();
+
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&dcfclks);
--
2.19.1
^ permalink raw reply related [flat|nested] 7+ messages in thread[parent not found: <20190222153906.661-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
[not found] ` <20190222153906.661-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>
@ 2019-02-22 17:31 ` Deucher, Alexander
2019-02-26 21:24 ` Sasha Levin
1 sibling, 0 replies; 7+ messages in thread
From: Deucher, Alexander @ 2019-02-22 17:31 UTC (permalink / raw)
To: Wentland, Harry,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
[-- Attachment #1.1: Type: text/plain, Size: 2535 bytes --]
Acked-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Harry Wentland <harry.wentland-5C7GfCeVMHo@public.gmane.org>
Sent: Friday, February 22, 2019 10:39 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; Wentland, Harry; stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
Powerplay functions called from dm_pp_* functions tend to do a
mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
those will disable/enable preemption.
Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
sure they happen outside of kernel_fpu_begin/end.
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Harry Wentland <harry.wentland-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 2a807b9f77f7..5955634f6e27 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1348,12 +1348,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
bool res;
- kernel_fpu_begin();
-
/* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&fclks);
@@ -1372,9 +1372,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
} else
BREAK_TO_DEBUGGER();
+ kernel_fpu_end();
+
res = dm_pp_get_clock_levels_by_type_with_voltage(
ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
+ kernel_fpu_begin();
+
if (res)
res = verify_clock_values(&dcfclks);
--
2.19.1
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
[not found] ` <20190222153906.661-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>
2019-02-22 17:31 ` Deucher, Alexander
@ 2019-02-26 21:24 ` Sasha Levin
[not found] ` <20190226212405.0CFF020645-+nuXSHJNwjE76Z2rM5mHXA@public.gmane.org>
1 sibling, 1 reply; 7+ messages in thread
From: Sasha Levin @ 2019-02-26 21:24 UTC (permalink / raw)
To: Sasha Levin, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: robdclark-Re5JQEeQqe8AvxtiuMwx3w, Harry Wentland,
stable-u79uwXL29TY76Z2rM5mHXA
Hi,
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v4.20.12, v4.19.25, v4.14.103, v4.9.160, v4.4.176, v3.18.136.
v4.20.12: Build OK!
v4.19.25: Build OK!
v4.14.103: Failed to apply! Possible dependencies:
00893681a0ff ("drm/amd/display: Reject PPLib clock values if they are invalid")
1b0c0f9dc5ca ("drm/amdgpu: move userptr BOs to CPU domain during CS v2")
1ed3d2567c80 ("drm/amdgpu: keep the MMU lock until the update ends v4")
3fe89771cb0a ("drm/amdgpu: stop reserving the BO in the MMU callback v3")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
60de1c1740f3 ("drm/amdgpu: use a rw_semaphore for MMU notifiers")
64b44524d4b2 ("drm/amd/display: bw debug options now apply to dml as well")
65111f25f1fe ("drm/amd/display: change dcn_ip and dcn_soc into pointers")
74c49c7ac14f ("drm/amdgpu/display: Add calcs code for DCN")
9037d802a978 ("drm/amd/display: refactor bw related variable structure in val_ctx")
9a18999640fa ("drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h")
9cca0b8e5df0 ("drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mapping")
a216ab09955d ("drm/amdgpu: fix userptr put_page handling")
b72cf4fca2bb ("drm/amdgpu: move taking mmap_sem into get_user_pages v2")
b884a2ec5863 ("drm/amd/display: call pplib to update clocks")
ca666a3c298f ("drm/amdgpu: stop using BO status for user pages")
fb3466a450cc ("drm/amd/display: Flattening core_dc to dc")
v4.9.160: Failed to apply! Possible dependencies:
00893681a0ff ("drm/amd/display: Reject PPLib clock values if they are invalid")
1cec20f0ea0e ("dma-buf: Restart reservation_object_wait_timeout_rcu() after writes")
3fe89771cb0a ("drm/amdgpu: stop reserving the BO in the MMU callback v3")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
4df654d293c6 ("drm/amdgpu: move amdgpu_uvd structure to uvd header")
5e5681788bef ("drm/amdgpu: move amdgpu_vce structure to vce header")
64b44524d4b2 ("drm/amd/display: bw debug options now apply to dml as well")
65111f25f1fe ("drm/amd/display: change dcn_ip and dcn_soc into pointers")
660e855813f7 ("amdgpu: use drm sync objects for shared semaphores (v6)")
74c49c7ac14f ("drm/amdgpu/display: Add calcs code for DCN")
78010cd9736e ("dma-buf/fence: add an lockdep_assert_held()")
9037d802a978 ("drm/amd/display: refactor bw related variable structure in val_ctx")
95aa13f6b196 ("drm/amdgpu: move amdgpu_vcn structure to vcn header")
95d0906f8506 ("drm/amdgpu: add initial vcn support and decode tests")
9a18999640fa ("drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h")
b636922553ee ("drm/amdgpu: only move VM BOs in the LRU during validation v2")
b72cf4fca2bb ("drm/amdgpu: move taking mmap_sem into get_user_pages v2")
b884a2ec5863 ("drm/amd/display: call pplib to update clocks")
f54d1867005c ("dma-buf: Rename struct fence to dma_fence")
fb3466a450cc ("drm/amd/display: Flattening core_dc to dc")
fedf54132d24 ("dma-buf: Restart reservation_object_get_fences_rcu() after writes")
v4.4.176: Failed to apply! Possible dependencies:
00893681a0ff ("drm/amd/display: Reject PPLib clock values if they are invalid")
1f7371b2a5fa ("drm/amd/powerplay: add basic powerplay framework")
288912cb95d1 ("drm/amdgpu: use $(src) in Makefile (v2)")
3c0eea6c35d9 ("drm/amdgpu: put VM page tables directly into duplicates list")
3f99dd814a6f ("drm/amdgpu: save and restore UVD context with suspend and resume")
4325198180e5 ("drm/amdgpu: remove GART page addr array")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
4acabfe3793e ("drm/amdgpu: fix num_ibs check")
4df654d293c6 ("drm/amdgpu: move amdgpu_uvd structure to uvd header")
50838c8cc413 ("drm/amdgpu: add proper job alloc/free functions")
56467ebfb254 ("drm/amdgpu: split VM PD and PT handling during CS")
5e5681788bef ("drm/amdgpu: move amdgpu_vce structure to vce header")
64b44524d4b2 ("drm/amd/display: bw debug options now apply to dml as well")
65111f25f1fe ("drm/amd/display: change dcn_ip and dcn_soc into pointers")
7270f8391df1 ("drm/amdgpu: add amdgpu_set_ib_value helper (v2)")
74c49c7ac14f ("drm/amdgpu/display: Add calcs code for DCN")
9037d802a978 ("drm/amd/display: refactor bw related variable structure in val_ctx")
95aa13f6b196 ("drm/amdgpu: move amdgpu_vcn structure to vcn header")
9a18999640fa ("drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h")
a1d29476d666 ("drm/amdgpu: optionally enable GART debugfs file")
a8fe58cec351 ("drm/amd: add ACP driver support")
b884a2ec5863 ("drm/amd/display: call pplib to update clocks")
c036554170fc ("drm/amdgpu: handle more than 10 UVD sessions (v2)")
c3cca41e6249 ("drm/amdgpu: cleanup amdgpu_cs_parser structure")
cadf97b196a1 ("drm/amdgpu: clean up non-scheduler code path (v2)")
cd75dc6887f1 ("drm/amdgpu: separate pushing CS to scheduler")
d71518b5aa7c ("drm/amdgpu: cleanup in kernel job submission")
d7af97dbccf0 ("drm/amdgpu: send UVD IB tests directly to the ring again")
d8e0cae64550 ("drm/amdgpu: validate duplicates first")
f69f90a113f2 ("drm/amdgpu: fix amdgpu_cs_get_threshold_for_moves handling")
fb3466a450cc ("drm/amd/display: Flattening core_dc to dc")
fdba11f4079e ("drm/amdgpu: move all Kconfig options to amdgpu/Kconfig")
v3.18.136: Failed to apply! Possible dependencies:
00893681a0ff ("drm/amd/display: Reject PPLib clock values if they are invalid")
04df25d12394 ("MAINTAINERS: Update amdkfd files")
130e0371b7d4 ("drm/amdgpu: Add H/W agnostic amdgpu <--> amdkfd interface")
16423d67936f ("Update MAINTAINERS and CREDITS files with amdkfd info")
1f7371b2a5fa ("drm/amd/powerplay: add basic powerplay framework")
288912cb95d1 ("drm/amdgpu: use $(src) in Makefile (v2)")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
46651cc5dbee ("drm/amdgpu fix amdgpu.dpm=0 (v2)")
49e7d9df9046 ("MAINTAINERS: Use tabs consistently")
564ea7900cff ("drm/amdgpu: enable uvd dpm and powergating")
5fc3aeeb9e55 ("drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)")
64b44524d4b2 ("drm/amd/display: bw debug options now apply to dml as well")
65111f25f1fe ("drm/amd/display: change dcn_ip and dcn_soc into pointers")
74c49c7ac14f ("drm/amdgpu/display: Add calcs code for DCN")
8e9198d0698a ("drm/amdgpu: move some atombios definitions to common folder (v2)")
9037d802a978 ("drm/amd/display: refactor bw related variable structure in val_ctx")
97b2e202fba0 ("drm/amdgpu: add amdgpu.h (v2)")
a02860aa2b2d ("drm/amdgpu: add atombios headers")
a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts")
aaa36a976bbb ("drm/amdgpu: Add initial VI support")
b80d8475c1fd ("drm/amdgpu: add scheduler initialization")
b884a2ec5863 ("drm/amd/display: call pplib to update clocks")
d03846af9275 ("drm/amd: Add CGS interfaces")
d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)")
fb3466a450cc ("drm/amd/display: Flattening core_dc to dc")
fdba11f4079e ("drm/amdgpu: move all Kconfig options to amdgpu/Kconfig")
How should we proceed with this patch?
--
Thanks,
Sasha
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block
2019-02-22 15:39 ` Harry Wentland
(?)
(?)
@ 2019-02-22 19:19 ` Rob Clark
-1 siblings, 0 replies; 7+ messages in thread
From: Rob Clark @ 2019-02-22 19:19 UTC (permalink / raw)
To: Harry Wentland; +Cc: amd-gfx, stable
On Fri, Feb 22, 2019 at 10:39 AM Harry Wentland <harry.wentland@amd.com> wrote:
>
> Powerplay functions called from dm_pp_* functions tend to do a
> mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
> those will disable/enable preemption.
>
> Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
> sure they happen outside of kernel_fpu_begin/end.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Rob Clark <robdclark@gmail.com>
> ---
> drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> index 2a807b9f77f7..5955634f6e27 100644
> --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> @@ -1348,12 +1348,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
> struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
> bool res;
>
> - kernel_fpu_begin();
> -
> /* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
> res = dm_pp_get_clock_levels_by_type_with_voltage(
> ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
>
> + kernel_fpu_begin();
> +
> if (res)
> res = verify_clock_values(&fclks);
>
> @@ -1372,9 +1372,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
> } else
> BREAK_TO_DEBUGGER();
>
> + kernel_fpu_end();
> +
> res = dm_pp_get_clock_levels_by_type_with_voltage(
> ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
>
> + kernel_fpu_begin();
> +
> if (res)
> res = verify_clock_values(&dcfclks);
>
> --
> 2.19.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-03-05 19:12 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-02-22 15:39 [PATCH] drm/amd/display: don't call dm_pp_ function from an fpu block Harry Wentland
2019-02-22 15:39 ` Harry Wentland
[not found] ` <20190222153906.661-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>
2019-02-22 17:31 ` Deucher, Alexander
2019-02-26 21:24 ` Sasha Levin
[not found] ` <20190226212405.0CFF020645-+nuXSHJNwjE76Z2rM5mHXA@public.gmane.org>
2019-03-05 19:12 ` Wentland, Harry
2019-03-05 19:12 ` Wentland, Harry
2019-02-22 19:19 ` Rob Clark
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