From: Igor Mammedov <imammedo@redhat.com>
To: Heyi Guo <guoheyi@huawei.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
qemu-devel@nongnu.org, Shannon Zhao <shannon.zhaosl@gmail.com>,
qemu-arm@nongnu.org, wanghaibin.wang@huawei.com
Subject: Re: [Qemu-devel] [PATCH v2] hw/arm/acpi: enable SHPC native hot plug
Date: Mon, 4 Mar 2019 16:27:11 +0100 [thread overview]
Message-ID: <20190304162711.105e09f2@redhat.com> (raw)
In-Reply-To: <1551705934-28745-1-git-send-email-guoheyi@huawei.com>
On Mon, 4 Mar 2019 21:25:34 +0800
Heyi Guo <guoheyi@huawei.com> wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
aml_store here is excessive, you can use shorter variant that x86 uses
aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
the last argument of aml_and() is the target var where to store computation result
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
WARNING: multiple messages have this Message-ID (diff)
From: Igor Mammedov <imammedo@redhat.com>
To: Heyi Guo <guoheyi@huawei.com>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
wanghaibin.wang@huawei.com,
Shannon Zhao <shannon.zhaosl@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2] hw/arm/acpi: enable SHPC native hot plug
Date: Mon, 4 Mar 2019 16:27:11 +0100 [thread overview]
Message-ID: <20190304162711.105e09f2@redhat.com> (raw)
In-Reply-To: <1551705934-28745-1-git-send-email-guoheyi@huawei.com>
On Mon, 4 Mar 2019 21:25:34 +0800
Heyi Guo <guoheyi@huawei.com> wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
aml_store here is excessive, you can use shorter variant that x86 uses
aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
the last argument of aml_and() is the target var where to store computation result
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
next prev parent reply other threads:[~2019-03-04 15:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-04 13:25 [Qemu-arm] [PATCH v2] hw/arm/acpi: enable SHPC native hot plug Heyi Guo
2019-03-04 13:25 ` [Qemu-devel] " Heyi Guo
2019-03-04 15:27 ` Igor Mammedov [this message]
2019-03-04 15:27 ` Igor Mammedov
2019-03-05 8:58 ` [Qemu-arm] " Heyi Guo
2019-03-05 8:58 ` [Qemu-devel] " Heyi Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190304162711.105e09f2@redhat.com \
--to=imammedo@redhat.com \
--cc=guoheyi@huawei.com \
--cc=mst@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=shannon.zhaosl@gmail.com \
--cc=wanghaibin.wang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.