All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Anson Huang <anson.huang@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"festevam@gmail.com" <festevam@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V4 1/3] dt-bindings: memory-controllers: freescale: add MMDC binding doc
Date: Mon, 11 Mar 2019 17:53:09 -0500	[thread overview]
Message-ID: <20190311225309.GA32334@bogus> (raw)
In-Reply-To: <1551403185-16314-1-git-send-email-Anson.Huang@nxp.com>

On Fri, Mar 01, 2019 at 01:24:18AM +0000, Anson Huang wrote:
> Freescale MMDC (Multi Mode DDR Controller) driver is supported
> since i.MX6Q, but not yet documented, this patch adds binding
> doc for MMDC module driver.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V3:
> 	- add i.MX6QP compatible name.
> ---
>  .../bindings/memory-controllers/fsl/mmdc.txt       | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> new file mode 100644
> index 0000000..e4e0b50
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> @@ -0,0 +1,33 @@
> +Freescale Multi Mode DDR controller (MMDC)
> +
> +Required properties :
> +- compatible : should be one of following:
> +	for i.MX6Q/i.MX6DL:
> +	- "fsl,imx6q-mmdc";
> +	for i.MX6QP:
> +	- "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SL:
> +	- "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SLL:
> +	- "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SX:
> +	- "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6UL/i.MX6ULL/i.MX6ULZ:
> +	- "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX7ULP:
> +	- "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc";
> +- reg : address and size of MMDC DDR controller registers
> +
> +Optional properties :
> +- clocks : the clock provided by the SoC to access the MMDC registers
> +
> +Example :
> +	mmdc0: memory-controller@21b0000 { /* MMDC0 */
> +		compatible = "fsl,imx6q-mmdc";
> +		reg = <0x021b0000 0x4000>;
> +		clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
> +	}
> +
> +	mmdc1: memory-controller@21b4000 { /* MMDC1 */
> +		reg = <0x021b4000 0x4000>;

What is this node? No compatible here should be considered invalid.

Seems like maybe the 1st node should have 2 register ranges if you want 
a single device.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Anson Huang <anson.huang@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"festevam@gmail.com" <festevam@gmail.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	dl-linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH V4 1/3] dt-bindings: memory-controllers: freescale: add MMDC binding doc
Date: Mon, 11 Mar 2019 17:53:09 -0500	[thread overview]
Message-ID: <20190311225309.GA32334@bogus> (raw)
In-Reply-To: <1551403185-16314-1-git-send-email-Anson.Huang@nxp.com>

On Fri, Mar 01, 2019 at 01:24:18AM +0000, Anson Huang wrote:
> Freescale MMDC (Multi Mode DDR Controller) driver is supported
> since i.MX6Q, but not yet documented, this patch adds binding
> doc for MMDC module driver.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V3:
> 	- add i.MX6QP compatible name.
> ---
>  .../bindings/memory-controllers/fsl/mmdc.txt       | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> new file mode 100644
> index 0000000..e4e0b50
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt
> @@ -0,0 +1,33 @@
> +Freescale Multi Mode DDR controller (MMDC)
> +
> +Required properties :
> +- compatible : should be one of following:
> +	for i.MX6Q/i.MX6DL:
> +	- "fsl,imx6q-mmdc";
> +	for i.MX6QP:
> +	- "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SL:
> +	- "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SLL:
> +	- "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6SX:
> +	- "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX6UL/i.MX6ULL/i.MX6ULZ:
> +	- "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
> +	for i.MX7ULP:
> +	- "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc";
> +- reg : address and size of MMDC DDR controller registers
> +
> +Optional properties :
> +- clocks : the clock provided by the SoC to access the MMDC registers
> +
> +Example :
> +	mmdc0: memory-controller@21b0000 { /* MMDC0 */
> +		compatible = "fsl,imx6q-mmdc";
> +		reg = <0x021b0000 0x4000>;
> +		clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
> +	}
> +
> +	mmdc1: memory-controller@21b4000 { /* MMDC1 */
> +		reg = <0x021b4000 0x4000>;

What is this node? No compatible here should be considered invalid.

Seems like maybe the 1st node should have 2 register ranges if you want 
a single device.

Rob

  parent reply	other threads:[~2019-03-11 22:53 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-01  1:24 [PATCH V4 1/3] dt-bindings: memory-controllers: freescale: add MMDC binding doc Anson Huang
2019-03-01  1:24 ` Anson Huang
2019-03-01  1:24 ` [PATCH V4 2/3] ARM: dts: imx7ulp: add mmdc support Anson Huang
2019-03-01  1:24   ` Anson Huang
2019-03-01  1:24 ` [PATCH V4 3/3] ARM: dts: imx: make MMDC node name generic Anson Huang
2019-03-01  1:24   ` Anson Huang
2019-03-01  1:26 ` [PATCH V4 1/3] dt-bindings: memory-controllers: freescale: add MMDC binding doc Fabio Estevam
2019-03-01  1:26   ` Fabio Estevam
2019-03-11 22:53 ` Rob Herring [this message]
2019-03-11 22:53   ` Rob Herring
2019-03-12  1:43   ` Anson Huang
2019-03-12  1:43     ` Anson Huang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190311225309.GA32334@bogus \
    --to=robh@kernel.org \
    --cc=anson.huang@nxp.com \
    --cc=devicetree@vger.kernel.org \
    --cc=festevam@gmail.com \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.