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From: Thierry Reding <thierry.reding@gmail.com>
To: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Linux ARM Mailing List" <linux-arm-kernel@lists.infradead.org>,
	"Christoph Vogtländer" <c.vogtlaender@sigma-surface-science.com>
Subject: Re: [PATCH] pwm: tiehrpwm: Update shadow register for disabling PWMs
Date: Wed, 20 Mar 2019 12:31:22 +0100	[thread overview]
Message-ID: <20190320113122.GC23838@ulmo> (raw)
In-Reply-To: <20190312090846.29519-1-vigneshr@ti.com>

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On Tue, Mar 12, 2019 at 02:38:46PM +0530, Vignesh Raghavendra wrote:
> From: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
> 
> It must be made sure that immediate mode is not already set, when
> modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
> modifications to the action-qualifier continuous S/W force
> register(AQSFRC) will be done in the active register.
> This may happen when both channels are being disabled. In this case,
> only the first channel state will be recorded as disabled in the shadow
> register. Later, when enabling the first channel again, the second
> channel would be enabled as well. Setting RLDCSF to zero, first, ensures
> that the shadow register is updated as desired.
> 
> Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
> Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
> [vigneshr@ti.com: Improve commit message]
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  drivers/pwm/pwm-tiehrpwm.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied, thanks.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-pwm@vger.kernel.org,
	"Christoph Vogtländer" <c.vogtlaender@sigma-surface-science.com>,
	linux-kernel@vger.kernel.org,
	"Linux ARM Mailing List" <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] pwm: tiehrpwm: Update shadow register for disabling PWMs
Date: Wed, 20 Mar 2019 12:31:22 +0100	[thread overview]
Message-ID: <20190320113122.GC23838@ulmo> (raw)
In-Reply-To: <20190312090846.29519-1-vigneshr@ti.com>


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On Tue, Mar 12, 2019 at 02:38:46PM +0530, Vignesh Raghavendra wrote:
> From: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
> 
> It must be made sure that immediate mode is not already set, when
> modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
> modifications to the action-qualifier continuous S/W force
> register(AQSFRC) will be done in the active register.
> This may happen when both channels are being disabled. In this case,
> only the first channel state will be recorded as disabled in the shadow
> register. Later, when enabling the first channel again, the second
> channel would be enabled as well. Setting RLDCSF to zero, first, ensures
> that the shadow register is updated as desired.
> 
> Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
> Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
> [vigneshr@ti.com: Improve commit message]
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  drivers/pwm/pwm-tiehrpwm.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied, thanks.

Thierry

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  reply	other threads:[~2019-03-20 11:31 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-12  9:08 [PATCH] pwm: tiehrpwm: Update shadow register for disabling PWMs Vignesh Raghavendra
2019-03-12  9:08 ` Vignesh Raghavendra
2019-03-20 11:31 ` Thierry Reding [this message]
2019-03-20 11:31   ` Thierry Reding

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