* [PATCH 3/3] [Outreachy kernel] staging: sm750fb: avoid camelcase variable names
@ 2019-03-21 11:24 Payal Kshirsagar
2019-03-21 19:09 ` Greg KH
0 siblings, 1 reply; 2+ messages in thread
From: Payal Kshirsagar @ 2019-03-21 11:24 UTC (permalink / raw)
To: outreachy-kernel; +Cc: Payal Kshirsagar
Eliminate camelcase variable names to fix the style issue – ‘avoid
camelcase’.
Signed-off-by: Payal Kshirsagar <payal.s.kshirsagar.98@gmail.com>
---
drivers/staging/sm750fb/ddk750_mode.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index ab21337..5dfa87d 100644
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -14,7 +14,7 @@
* in bit 29:27 of Display Control register.
*/
static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mode_param,
- unsigned long dispControl)
+ unsigned long disp_control)
{
unsigned long x, y;
@@ -35,42 +35,42 @@ static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mod
((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
/*
- * Assume common fields in dispControl have been properly set before
+ * Assume common fields in disp_control have been properly set before
* calling this function.
- * This function only sets the extra fields in dispControl.
+ * This function only sets the extra fields in disp_control.
*/
/* Clear bit 29:27 of display control register */
- dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK;
+ disp_control &= ~CRT_DISPLAY_CTRL_CLK_MASK;
/* Set bit 29:27 of display control register for the right clock */
/* Note that SM750LE only need to supported 7 resolutions. */
if (x == 800 && y == 600)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL41;
else if (x == 1024 && y == 768)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL65;
else if (x == 1152 && y == 864)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
else if (x == 1280 && y == 768)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
else if (x == 1280 && y == 720)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL74;
else if (x == 1280 && y == 960)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
else if (x == 1280 && y == 1024)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
else /* default to VGA clock */
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL25;
/* Set bit 25:24 of display controller */
- dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
+ disp_control |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
/* Set bit 14 of display controller */
- dispControl |= DISPLAY_CTRL_CLOCK_PHASE;
+ disp_control |= DISPLAY_CTRL_CLOCK_PHASE;
- poke32(CRT_DISPLAY_CTRL, dispControl);
+ poke32(CRT_DISPLAY_CTRL, disp_control);
- return dispControl;
+ return disp_control;
}
/* only timing related registers will be programed */
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 3/3] [Outreachy kernel] staging: sm750fb: avoid camelcase variable names
2019-03-21 11:24 [PATCH 3/3] [Outreachy kernel] staging: sm750fb: avoid camelcase variable names Payal Kshirsagar
@ 2019-03-21 19:09 ` Greg KH
0 siblings, 0 replies; 2+ messages in thread
From: Greg KH @ 2019-03-21 19:09 UTC (permalink / raw)
To: Payal Kshirsagar; +Cc: outreachy-kernel
On Thu, Mar 21, 2019 at 04:54:17PM +0530, Payal Kshirsagar wrote:
> Eliminate camelcase variable names to fix the style issue – ‘avoid
> camelcase’.
>
> Signed-off-by: Payal Kshirsagar <payal.s.kshirsagar.98@gmail.com>
> ---
> drivers/staging/sm750fb/ddk750_mode.c | 32 ++++++++++++++++----------------
> 1 file changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
> index ab21337..5dfa87d 100644
> --- a/drivers/staging/sm750fb/ddk750_mode.c
> +++ b/drivers/staging/sm750fb/ddk750_mode.c
> @@ -14,7 +14,7 @@
> * in bit 29:27 of Display Control register.
> */
> static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mode_param,
> - unsigned long dispControl)
> + unsigned long disp_control)
> {
> unsigned long x, y;
>
> @@ -35,42 +35,42 @@ static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mod
> ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
>
> /*
> - * Assume common fields in dispControl have been properly set before
> + * Assume common fields in disp_control have been properly set before
> * calling this function.
> - * This function only sets the extra fields in dispControl.
> + * This function only sets the extra fields in disp_control.
> */
>
> /* Clear bit 29:27 of display control register */
> - dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK;
> + disp_control &= ~CRT_DISPLAY_CTRL_CLK_MASK;
>
> /* Set bit 29:27 of display control register for the right clock */
> /* Note that SM750LE only need to supported 7 resolutions. */
> if (x == 800 && y == 600)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL41;
> else if (x == 1024 && y == 768)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL65;
> else if (x == 1152 && y == 864)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
> else if (x == 1280 && y == 768)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
> else if (x == 1280 && y == 720)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL74;
> else if (x == 1280 && y == 960)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
> else if (x == 1280 && y == 1024)
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
> else /* default to VGA clock */
> - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25;
> + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL25;
>
> /* Set bit 25:24 of display controller */
> - dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
> + disp_control |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
>
> /* Set bit 14 of display controller */
> - dispControl |= DISPLAY_CTRL_CLOCK_PHASE;
> + disp_control |= DISPLAY_CTRL_CLOCK_PHASE;
>
> - poke32(CRT_DISPLAY_CTRL, dispControl);
> + poke32(CRT_DISPLAY_CTRL, disp_control);
>
> - return dispControl;
> + return disp_control;
> }
>
> /* only timing related registers will be programed */
This patch also does not apply :(
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-03-21 19:09 ` Greg KH
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