[PATCH v2 2/3] mwait-idle: add support for AMD processors

["Woods, Brian" <Brian.Woods@amd.com>]

From: Brian Woods <brian.woods@amd.com>

Newer AMD processors (F17h) have mwait support which is compatible with
Intel.  Add some checks to make sure vendor specific code is run
correctly and some infrastructure to facilitate adding AMD processors.

This is done so that Xen will not be reliant on dom0 passing the parsed
ACPI tables back since Xen doesn't have an AML interpreter. This can be
unreliable or broken in some cases.

Signed-off-by: Brian Woods <brian.woods@amd.com>
---
 xen/arch/x86/cpu/mwait-idle.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index b9c7f75882..58629f1c29 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -964,6 +964,13 @@ static const struct x86_cpu_id intel_idle_ids[] __initconstrel = {
 	{}
 };
 
+#define ACPU(family, model, cpu) \
+	{ X86_VENDOR_AMD, family, model, X86_FEATURE_ALWAYS, &idle_cpu_##cpu}
+
+static const struct x86_cpu_id amd_idle_ids[] __initconstrel = {
+	{}
+};
+
 /*
  * ivt_idle_state_table_update(void)
  *
@@ -1100,6 +1107,9 @@ static void __init sklh_idle_state_table_update(void)
  */
 static void __init mwait_idle_state_table_update(void)
 {
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+		return;
+
 	switch (boot_cpu_data.x86_model) {
 	case 0x3e: /* IVT */
 		ivt_idle_state_table_update();
@@ -1117,7 +1127,16 @@ static void __init mwait_idle_state_table_update(void)
 static int __init mwait_idle_probe(void)
 {
 	unsigned int eax, ebx, ecx;
-	const struct x86_cpu_id *id = x86_match_cpu(intel_idle_ids);
+	const struct x86_cpu_id *id = NULL;
+
+	switch (boot_cpu_data.x86_vendor) {
+	case X86_VENDOR_INTEL:
+		id = x86_match_cpu(intel_idle_ids);
+		break;
+	case X86_VENDOR_AMD:
+		id = x86_match_cpu(amd_idle_ids);
+		break;
+	}
 
 	if (!id) {
 		pr_debug(PREFIX "does not run on family %d model %d\n",
-- 
2.11.0


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