All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Darren Hart <dvhart@infradead.org>,
	platform-driver-x86@vger.kernel.org,
	Zha Qipeng <qipeng.zha@intel.com>,
	Kuppuswamy Sathyanarayanan
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	junxiao.chang@intel.com, linux-kernel@vger.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 2/4] platform/x86: intel_pmc_ipc: Apply same width for offset definitions
Date: Tue,  9 Apr 2019 14:25:13 +0300	[thread overview]
Message-ID: <20190409112515.84725-2-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20190409112515.84725-1-andriy.shevchenko@linux.intel.com>

Apply same width for offset definitions to make code more consistent.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/platform/x86/intel_pmc_ipc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c
index eb0b342996ca..9007aa717586 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -40,7 +40,7 @@
  * The ARC handles the interrupt and services it, writing optional data to
  * the IPC1 registers, updates the IPC_STS response register with the status.
  */
-#define IPC_CMD			0x0
+#define IPC_CMD			0x00
 #define		IPC_CMD_MSI		BIT(8)
 #define		IPC_CMD_SIZE		16
 #define		IPC_CMD_SUBCMD		12
@@ -101,8 +101,8 @@
 #define TELEM_SSRAM_SIZE		240
 #define TELEM_PMC_SSRAM_OFFSET		0x1B00
 #define TELEM_PUNIT_SSRAM_OFFSET	0x1A00
-#define TCO_PMC_OFFSET			0x8
-#define TCO_PMC_SIZE			0x4
+#define TCO_PMC_OFFSET			0x08
+#define TCO_PMC_SIZE			0x04
 
 /* PMC register bit definitions */
 
-- 
2.20.1

  reply	other threads:[~2019-04-09 11:25 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-09 11:25 [PATCH v1 1/4] platform/x86: intel_pmc_ipc: Use BIT() macro Andy Shevchenko
2019-04-09 11:25 ` Andy Shevchenko [this message]
2019-04-09 17:09   ` [PATCH v1 2/4] platform/x86: intel_pmc_ipc: Apply same width for offset definitions sathyanarayanan kuppuswamy
2019-04-09 11:25 ` [PATCH v1 3/4] platform/x86: intel_pmc_ipc: Don't map non-used optional resources Andy Shevchenko
2019-04-10 18:05   ` sathyanarayanan kuppuswamy
2019-04-09 11:25 ` [PATCH v1 4/4] platform/x86: intel_punit_ipc: Revert "Fix resource ioremap warning" Andy Shevchenko
2019-04-10 18:06   ` sathyanarayanan kuppuswamy
     [not found] ` <7bb60283-f99f-679d-4efa-45962ccd68f3@linux.intel.com>
2019-04-09 17:39   ` [PATCH v1 1/4] platform/x86: intel_pmc_ipc: Use BIT() macro Andy Shevchenko
2019-04-10 13:59     ` Andy Shevchenko
2019-04-10 17:55       ` sathyanarayanan kuppuswamy

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190409112515.84725-2-andriy.shevchenko@linux.intel.com \
    --to=andriy.shevchenko@linux.intel.com \
    --cc=dvhart@infradead.org \
    --cc=junxiao.chang@intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=qipeng.zha@intel.com \
    --cc=sathyanarayanan.kuppuswamy@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.