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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/7] drm/i915/icl: Handle rps interrupts without irq lock
Date: Wed, 10 Apr 2019 13:59:21 +0300	[thread overview]
Message-ID: <20190410105923.18546-5-mika.kuoppala@linux.intel.com> (raw)
In-Reply-To: <20190410105923.18546-1-mika.kuoppala@linux.intel.com>

Unlike previous gens, we already hold the irq_lock on
entering the rps handler so we can't use it as it is.

Make a gen11 specific rps interrupt handler without
locking.

v2: return early (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_irq.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6454ddc37f8b..eb0eb96ac751 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1796,6 +1796,25 @@ static void i9xx_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
 /* The RPS events need forcewake, so we add them to a work queue and mask their
  * IMR bits until the work is done. Other interrupts can be processed without
  * the work queue. */
+static void gen11_rps_irq_handler(struct drm_i915_private *i915, u32 pm_iir)
+{
+	struct intel_rps *rps = &i915->gt_pm.rps;
+	const u32 events = i915->pm_rps_events & pm_iir;
+
+	lockdep_assert_held(&i915->irq_lock);
+
+	if (unlikely(!events))
+		return;
+
+	gen6_mask_pm_irq(i915, events);
+
+	if (!rps->interrupts_enabled)
+		return;
+
+	rps->pm_iir |= events;
+	schedule_work(&rps->work);
+}
+
 static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
 {
 	struct intel_rps *rps = &dev_priv->gt_pm.rps;
@@ -2949,7 +2968,7 @@ gen11_other_irq_handler(struct drm_i915_private * const i915,
 			const u8 instance, const u16 iir)
 {
 	if (instance == OTHER_GTPM_INSTANCE)
-		return gen6_rps_irq_handler(i915, iir);
+		return gen11_rps_irq_handler(i915, iir);
 
 	WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",
 		  instance, iir);
-- 
2.17.1

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  parent reply	other threads:[~2019-04-10 10:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-10 10:59 [PATCH 1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 Mika Kuoppala
2019-04-10 10:59 ` [PATCH 2/7] drm/i915/icl: Apply a recommended rc6 threshold Mika Kuoppala
2019-04-10 13:37   ` Chris Wilson
2019-04-10 13:53   ` Michal Wajdeczko
2019-04-10 10:59 ` [PATCH 3/7] drm/i915/icl: Enable media sampler powergate Mika Kuoppala
2019-04-10 13:38   ` Chris Wilson
2019-04-10 10:59 ` [PATCH 4/7] drm/i915/icl: Disable video turbo mode for rp control Mika Kuoppala
2019-04-10 11:04   ` Chris Wilson
2019-04-10 13:24     ` Mika Kuoppala
2019-04-10 13:43       ` Chris Wilson
2019-04-10 10:59 ` Mika Kuoppala [this message]
2019-04-10 10:59 ` [PATCH 6/7] drm/i915: Use Engine1 instance for gen11 pm interrupts Mika Kuoppala
2019-04-10 13:39   ` Chris Wilson
2019-04-10 10:59 ` [PATCH 7/7] drm/i915/icl: Don't warn on spurious interrupts Mika Kuoppala
2019-04-10 11:07   ` Chris Wilson
2019-04-10 11:10 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 Patchwork
2019-04-10 11:31 ` ✓ Fi.CI.BAT: success " Patchwork
2019-04-10 14:32 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 (rev2) Patchwork
2019-04-10 14:57 ` ✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 Patchwork
2019-04-10 15:01 ` ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 (rev2) Patchwork
2019-04-10 22:24 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-04-11  7:45   ` Chris Wilson

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