All of lore.kernel.org
 help / color / mirror / Atom feed
From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
	jonathanh@nvidia.com, kishon@ti.com, catalin.marinas@arm.com,
	will.deacon@arm.com, lorenzo.pieralisi@arm.com,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	mperttunen@nvidia.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V2 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board
Date: Mon, 15 Apr 2019 17:12:35 +0200	[thread overview]
Message-ID: <20190415151235.GH29254@ulmo> (raw)
In-Reply-To: <1554407683-31580-14-git-send-email-vidyas@nvidia.com>

[-- Attachment #1: Type: text/plain, Size: 2694 bytes --]

On Fri, Apr 05, 2019 at 01:24:40AM +0530, Vidya Sagar wrote:
> Enable PCIe controller nodes to enable respective PCIe slots on
> P2972-0000 board. Following is the ownership of slots by different
> PCIe controllers.
> Controller-0 : M.2 Key-M slot
> Controller-1 : On-board Marvell eSATA controller
> Controller-3 : M.2 Key-E slot
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> Changes since [v1]:
> * Dropped 'pcie-' from phy-names property strings
> 
>  arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi     |  2 +-
>  arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 50 ++++++++++++++++++++++
>  2 files changed, 51 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> index 246c1ebbd055..13263529125b 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> @@ -191,7 +191,7 @@
>  						regulator-boot-on;
>  					};
>  
> -					sd3 {
> +					vdd_1v8ao: sd3 {
>  						regulator-name = "VDD_1V8AO";
>  						regulator-min-microvolt = <1800000>;
>  						regulator-max-microvolt = <1800000>;
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> index b62e96945846..82eb30bceaa6 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> @@ -169,4 +169,54 @@
>  			};
>  		};
>  	};
> +
> +	pcie@14180000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_2>,
> +		       <&p2u_3>,
> +		       <&p2u_4>,
> +		       <&p2u_5>;

You can use multiple entries on a single line, especially if they are
this short.

> +		phy-names = "p2u-0", "p2u-1", "p2u-2",
> +			    "p2u-3";

Same here.

> +	};
> +
> +	pcie@14100000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_0>;
> +		phy-names = "p2u-0";
> +	};
> +
> +	pcie@14140000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_7>;
> +		phy-names = "p2u-0";
> +	};
> +
> +	pcie@141a0000 {
> +		status = "disabled";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_12>,
> +		       <&p2u_13>,
> +		       <&p2u_14>,
> +		       <&p2u_15>,
> +		       <&p2u_16>,
> +		       <&p2u_17>,
> +		       <&p2u_18>,
> +		       <&p2u_19>;
> +
> +		phy-names = "p2u-0", "p2u-1", "p2u-2",
> +			    "p2u-3", "p2u-4", "p2u-5",
> +			    "p2u-6", "p2u-7";

And here.

Thierry

> +	};
>  };
> -- 
> 2.7.4
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	lorenzo.pieralisi@arm.com, mperttunen@nvidia.com,
	mmaddireddy@nvidia.com, linux-pci@vger.kernel.org,
	catalin.marinas@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, kthota@nvidia.com, kishon@ti.com,
	linux-tegra@vger.kernel.org, robh+dt@kernel.org,
	gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
	bhelgaas@google.com, jonathanh@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: Re: [PATCH V2 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board
Date: Mon, 15 Apr 2019 17:12:35 +0200	[thread overview]
Message-ID: <20190415151235.GH29254@ulmo> (raw)
In-Reply-To: <1554407683-31580-14-git-send-email-vidyas@nvidia.com>


[-- Attachment #1.1: Type: text/plain, Size: 2694 bytes --]

On Fri, Apr 05, 2019 at 01:24:40AM +0530, Vidya Sagar wrote:
> Enable PCIe controller nodes to enable respective PCIe slots on
> P2972-0000 board. Following is the ownership of slots by different
> PCIe controllers.
> Controller-0 : M.2 Key-M slot
> Controller-1 : On-board Marvell eSATA controller
> Controller-3 : M.2 Key-E slot
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> Changes since [v1]:
> * Dropped 'pcie-' from phy-names property strings
> 
>  arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi     |  2 +-
>  arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 50 ++++++++++++++++++++++
>  2 files changed, 51 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> index 246c1ebbd055..13263529125b 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> @@ -191,7 +191,7 @@
>  						regulator-boot-on;
>  					};
>  
> -					sd3 {
> +					vdd_1v8ao: sd3 {
>  						regulator-name = "VDD_1V8AO";
>  						regulator-min-microvolt = <1800000>;
>  						regulator-max-microvolt = <1800000>;
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> index b62e96945846..82eb30bceaa6 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> @@ -169,4 +169,54 @@
>  			};
>  		};
>  	};
> +
> +	pcie@14180000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_2>,
> +		       <&p2u_3>,
> +		       <&p2u_4>,
> +		       <&p2u_5>;

You can use multiple entries on a single line, especially if they are
this short.

> +		phy-names = "p2u-0", "p2u-1", "p2u-2",
> +			    "p2u-3";

Same here.

> +	};
> +
> +	pcie@14100000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_0>;
> +		phy-names = "p2u-0";
> +	};
> +
> +	pcie@14140000 {
> +		status = "okay";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_7>;
> +		phy-names = "p2u-0";
> +	};
> +
> +	pcie@141a0000 {
> +		status = "disabled";
> +
> +		vddio-pex-ctl-supply = <&vdd_1v8ao>;
> +
> +		phys = <&p2u_12>,
> +		       <&p2u_13>,
> +		       <&p2u_14>,
> +		       <&p2u_15>,
> +		       <&p2u_16>,
> +		       <&p2u_17>,
> +		       <&p2u_18>,
> +		       <&p2u_19>;
> +
> +		phy-names = "p2u-0", "p2u-1", "p2u-2",
> +			    "p2u-3", "p2u-4", "p2u-5",
> +			    "p2u-6", "p2u-7";

And here.

Thierry

> +	};
>  };
> -- 
> 2.7.4
> 

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-04-15 15:12 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 19:54 [PATCH V2 00/16] Add Tegra194 PCIe support Vidya Sagar
2019-04-04 19:54 ` Vidya Sagar
2019-04-04 19:54 ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 01/16] PCI: Add #defines for PCIe spec r4.0 features Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-11 10:13   ` Thierry Reding
2019-04-11 10:13     ` Thierry Reding
2019-04-16 13:15     ` Vidya Sagar
2019-04-16 13:15       ` Vidya Sagar
2019-04-16 13:15       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 02/16] PCI/PME: Export pcie_pme_disable_msi() API Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-11 10:16   ` Thierry Reding
2019-04-11 10:16     ` Thierry Reding
2019-04-16 13:30     ` Vidya Sagar
2019-04-16 13:30       ` Vidya Sagar
2019-04-16 13:30       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 03/16] PCI: Export pcie_bus_config symbol Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 04/16] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 05/16] PCI: dwc: Move config space capability search API Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 06/16] PCI: dwc: Add ext " Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 07/16] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-15 14:54   ` Thierry Reding
2019-04-15 14:54     ` Thierry Reding
2019-04-16 14:29     ` Vidya Sagar
2019-04-16 14:29       ` Vidya Sagar
2019-04-16 14:29       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 08/16] PCI: dwc: Add support to enable " Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 09/16] Documentation/devicetree: Add PCIe supports-clkreq property Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 10/16] dt-bindings: PCI: tegra: Add device tree support for T194 Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-15 15:08   ` Thierry Reding
2019-04-15 15:08     ` Thierry Reding
2019-04-16 15:33     ` Vidya Sagar
2019-04-16 15:33       ` Vidya Sagar
2019-04-16 15:33       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 11/16] dt-bindings: PHY: P2U: Add Tegra 194 P2U block Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 12/16] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-15 15:15   ` Thierry Reding
2019-04-15 15:15     ` Thierry Reding
2019-04-16 17:48     ` Vidya Sagar
2019-04-16 17:48       ` Vidya Sagar
2019-04-16 17:48       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-15 15:12   ` Thierry Reding [this message]
2019-04-15 15:12     ` Thierry Reding
2019-04-16 17:55     ` Vidya Sagar
2019-04-16 17:55       ` Vidya Sagar
2019-04-16 17:55       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 14/16] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-15 15:31   ` Thierry Reding
2019-04-15 15:31     ` Thierry Reding
2019-04-15 15:33     ` Thierry Reding
2019-04-15 15:33       ` Thierry Reding
2019-04-16 18:14     ` Vidya Sagar
2019-04-16 18:14       ` Vidya Sagar
2019-04-16 18:14       ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 15/16] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 16/16] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar
2019-04-04 19:54   ` Vidya Sagar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190415151235.GH29254@ulmo \
    --to=thierry.reding@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@ti.com \
    --cc=kthota@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mmaddireddy@nvidia.com \
    --cc=mperttunen@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=sagar.tv@gmail.com \
    --cc=vidyas@nvidia.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.