From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: eric.auger@redhat.com, zhongmiao@hisilicon.com,
rjw@rjwysocki.net, joro@8bytes.org, will.deacon@arm.com,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
iommu@lists.linux-foundation.org, hanjun.guo@linaro.org,
sudeep.holla@arm.com, bhelgaas@google.com, okaya@kernel.org,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org,
lenb@kernel.org
Subject: Re: [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes
Date: Thu, 18 Apr 2019 12:20:29 +0100 [thread overview]
Message-ID: <20190418112018.GA20470@red-moon> (raw)
In-Reply-To: <20190417182448.12382-4-jean-philippe.brucker@arm.com>
On Wed, Apr 17, 2019 at 07:24:42PM +0100, Jean-Philippe Brucker wrote:
> Root complex node in IORT has a bit telling whether it supports ATS or
> not. Store this bit in the IOMMU fwspec when setting up a device, so it
> can be accessed later by an IOMMU driver. In the future we'll probably
> want to store this bit at the host bridge or SMMU rather than in each
> endpoint.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
> ---
> drivers/acpi/arm64/iort.c | 11 +++++++++++
> include/linux/iommu.h | 4 ++++
> 2 files changed, 15 insertions(+)
For the IORT portion:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index e48894e002ba..4000902e57f0 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
> dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
> }
>
> +static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
> +{
> + struct acpi_iort_root_complex *pci_rc;
> +
> + pci_rc = (struct acpi_iort_root_complex *)node->node_data;
> + return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
> +}
> +
> /**
> * iort_iommu_configure - Set-up IOMMU configuration for a device.
> *
> @@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
> info.node = node;
> err = pci_for_each_dma_alias(to_pci_dev(dev),
> iort_pci_iommu_init, &info);
> +
> + if (!err && iort_pci_rc_supports_ats(node))
> + dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
> } else {
> int i = 0;
>
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 480921dfbadf..51ab006d348e 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -446,6 +446,7 @@ struct iommu_fwspec {
> const struct iommu_ops *ops;
> struct fwnode_handle *iommu_fwnode;
> void *iommu_priv;
> + u32 flags;
> unsigned int num_ids;
> u32 ids[1];
> };
> @@ -458,6 +459,9 @@ struct iommu_sva {
> const struct iommu_sva_ops *ops;
> };
>
> +/* ATS is supported */
> +#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
> +
> int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
> const struct iommu_ops *ops);
> void iommu_fwspec_free(struct device *dev);
> --
> 2.21.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: will.deacon@arm.com, bhelgaas@google.com,
iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
robin.murphy@arm.com, joro@8bytes.org, hanjun.guo@linaro.org,
sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org,
okaya@kernel.org, zhongmiao@hisilicon.com, eric.auger@redhat.com,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes
Date: Thu, 18 Apr 2019 12:20:29 +0100 [thread overview]
Message-ID: <20190418112018.GA20470@red-moon> (raw)
Message-ID: <20190418112029.VUwAtL6naQNVak4aceooNommKanYKd31JaF8HY6gKqU@z> (raw)
In-Reply-To: <20190417182448.12382-4-jean-philippe.brucker@arm.com>
On Wed, Apr 17, 2019 at 07:24:42PM +0100, Jean-Philippe Brucker wrote:
> Root complex node in IORT has a bit telling whether it supports ATS or
> not. Store this bit in the IOMMU fwspec when setting up a device, so it
> can be accessed later by an IOMMU driver. In the future we'll probably
> want to store this bit at the host bridge or SMMU rather than in each
> endpoint.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
> ---
> drivers/acpi/arm64/iort.c | 11 +++++++++++
> include/linux/iommu.h | 4 ++++
> 2 files changed, 15 insertions(+)
For the IORT portion:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index e48894e002ba..4000902e57f0 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
> dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
> }
>
> +static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
> +{
> + struct acpi_iort_root_complex *pci_rc;
> +
> + pci_rc = (struct acpi_iort_root_complex *)node->node_data;
> + return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
> +}
> +
> /**
> * iort_iommu_configure - Set-up IOMMU configuration for a device.
> *
> @@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
> info.node = node;
> err = pci_for_each_dma_alias(to_pci_dev(dev),
> iort_pci_iommu_init, &info);
> +
> + if (!err && iort_pci_rc_supports_ats(node))
> + dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
> } else {
> int i = 0;
>
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 480921dfbadf..51ab006d348e 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -446,6 +446,7 @@ struct iommu_fwspec {
> const struct iommu_ops *ops;
> struct fwnode_handle *iommu_fwnode;
> void *iommu_priv;
> + u32 flags;
> unsigned int num_ids;
> u32 ids[1];
> };
> @@ -458,6 +459,9 @@ struct iommu_sva {
> const struct iommu_sva_ops *ops;
> };
>
> +/* ATS is supported */
> +#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
> +
> int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
> const struct iommu_ops *ops);
> void iommu_fwspec_free(struct device *dev);
> --
> 2.21.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: zhongmiao@hisilicon.com, rjw@rjwysocki.net, will.deacon@arm.com,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
iommu@lists.linux-foundation.org, sudeep.holla@arm.com,
bhelgaas@google.com, okaya@kernel.org, robin.murphy@arm.com,
linux-arm-kernel@lists.infradead.org, lenb@kernel.org
Subject: Re: [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes
Date: Thu, 18 Apr 2019 12:20:29 +0100 [thread overview]
Message-ID: <20190418112018.GA20470@red-moon> (raw)
Message-ID: <20190418112029.pjUhWrJSucwwfudqw2MQr0r2EHG7rIDyjxtg3mAsdE8@z> (raw)
In-Reply-To: <20190417182448.12382-4-jean-philippe.brucker@arm.com>
On Wed, Apr 17, 2019 at 07:24:42PM +0100, Jean-Philippe Brucker wrote:
> Root complex node in IORT has a bit telling whether it supports ATS or
> not. Store this bit in the IOMMU fwspec when setting up a device, so it
> can be accessed later by an IOMMU driver. In the future we'll probably
> want to store this bit at the host bridge or SMMU rather than in each
> endpoint.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
> ---
> drivers/acpi/arm64/iort.c | 11 +++++++++++
> include/linux/iommu.h | 4 ++++
> 2 files changed, 15 insertions(+)
For the IORT portion:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index e48894e002ba..4000902e57f0 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
> dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
> }
>
> +static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
> +{
> + struct acpi_iort_root_complex *pci_rc;
> +
> + pci_rc = (struct acpi_iort_root_complex *)node->node_data;
> + return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
> +}
> +
> /**
> * iort_iommu_configure - Set-up IOMMU configuration for a device.
> *
> @@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
> info.node = node;
> err = pci_for_each_dma_alias(to_pci_dev(dev),
> iort_pci_iommu_init, &info);
> +
> + if (!err && iort_pci_rc_supports_ats(node))
> + dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
> } else {
> int i = 0;
>
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 480921dfbadf..51ab006d348e 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -446,6 +446,7 @@ struct iommu_fwspec {
> const struct iommu_ops *ops;
> struct fwnode_handle *iommu_fwnode;
> void *iommu_priv;
> + u32 flags;
> unsigned int num_ids;
> u32 ids[1];
> };
> @@ -458,6 +459,9 @@ struct iommu_sva {
> const struct iommu_sva_ops *ops;
> };
>
> +/* ATS is supported */
> +#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
> +
> int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
> const struct iommu_ops *ops);
> void iommu_fwspec_free(struct device *dev);
> --
> 2.21.0
>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: eric.auger@redhat.com, zhongmiao@hisilicon.com,
rjw@rjwysocki.net, joro@8bytes.org, will.deacon@arm.com,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
iommu@lists.linux-foundation.org, hanjun.guo@linaro.org,
sudeep.holla@arm.com, bhelgaas@google.com, okaya@kernel.org,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org,
lenb@kernel.org
Subject: Re: [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes
Date: Thu, 18 Apr 2019 12:20:29 +0100 [thread overview]
Message-ID: <20190418112018.GA20470@red-moon> (raw)
In-Reply-To: <20190417182448.12382-4-jean-philippe.brucker@arm.com>
On Wed, Apr 17, 2019 at 07:24:42PM +0100, Jean-Philippe Brucker wrote:
> Root complex node in IORT has a bit telling whether it supports ATS or
> not. Store this bit in the IOMMU fwspec when setting up a device, so it
> can be accessed later by an IOMMU driver. In the future we'll probably
> want to store this bit at the host bridge or SMMU rather than in each
> endpoint.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
> ---
> drivers/acpi/arm64/iort.c | 11 +++++++++++
> include/linux/iommu.h | 4 ++++
> 2 files changed, 15 insertions(+)
For the IORT portion:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index e48894e002ba..4000902e57f0 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
> dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
> }
>
> +static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
> +{
> + struct acpi_iort_root_complex *pci_rc;
> +
> + pci_rc = (struct acpi_iort_root_complex *)node->node_data;
> + return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
> +}
> +
> /**
> * iort_iommu_configure - Set-up IOMMU configuration for a device.
> *
> @@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
> info.node = node;
> err = pci_for_each_dma_alias(to_pci_dev(dev),
> iort_pci_iommu_init, &info);
> +
> + if (!err && iort_pci_rc_supports_ats(node))
> + dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
> } else {
> int i = 0;
>
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 480921dfbadf..51ab006d348e 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -446,6 +446,7 @@ struct iommu_fwspec {
> const struct iommu_ops *ops;
> struct fwnode_handle *iommu_fwnode;
> void *iommu_priv;
> + u32 flags;
> unsigned int num_ids;
> u32 ids[1];
> };
> @@ -458,6 +459,9 @@ struct iommu_sva {
> const struct iommu_sva_ops *ops;
> };
>
> +/* ATS is supported */
> +#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
> +
> int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
> const struct iommu_ops *ops);
> void iommu_fwspec_free(struct device *dev);
> --
> 2.21.0
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-04-18 11:20 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-17 18:24 [PATCH v3 0/9] Add PCI ATS support to Arm SMMUv3 Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
[not found] ` <20190417182448.12382-1-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-17 18:24 ` [PATCH v3 1/9] PCI: Move ATS declarations outside of CONFIG_PCI Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
[not found] ` <20190417182448.12382-2-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-17 19:47 ` Bjorn Helgaas
2019-04-17 19:47 ` Bjorn Helgaas
2019-04-17 19:47 ` Bjorn Helgaas
2019-04-17 19:47 ` Bjorn Helgaas
2019-04-17 18:24 ` [PATCH v3 2/9] PCI: Add a stub for pci_ats_disabled() Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
[not found] ` <20190417182448.12382-3-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-17 19:48 ` Bjorn Helgaas
2019-04-17 19:48 ` Bjorn Helgaas
2019-04-17 19:48 ` Bjorn Helgaas
2019-04-17 19:48 ` Bjorn Helgaas
2019-04-17 18:24 ` [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-18 11:20 ` Lorenzo Pieralisi [this message]
2019-04-18 11:20 ` Lorenzo Pieralisi
2019-04-18 11:20 ` Lorenzo Pieralisi
2019-04-18 11:20 ` Lorenzo Pieralisi
2019-04-17 18:24 ` [PATCH v3 4/9] iommu/arm-smmu-v3: Rename arm_smmu_master_data to arm_smmu_master Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 5/9] iommu/arm-smmu-v3: Store SteamIDs in master Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 6/9] iommu/arm-smmu-v3: Add a master->domain pointer Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 7/9] iommu/arm-smmu-v3: Link domains and devices Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 8/9] iommu/arm-smmu-v3: Add support for PCI ATS Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-07-01 17:41 ` Robin Murphy
2019-07-01 17:41 ` Robin Murphy
2019-07-01 17:41 ` Robin Murphy
2019-07-02 14:59 ` Jean-Philippe Brucker
2019-07-02 14:59 ` Jean-Philippe Brucker
2019-07-02 14:59 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 9/9] iommu/arm-smmu-v3: Disable tagged pointers Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker
2019-04-23 11:21 ` [PATCH v3 0/9] Add PCI ATS support to Arm SMMUv3 Will Deacon
2019-04-23 11:21 ` Will Deacon
2019-04-23 11:21 ` Will Deacon
2019-04-23 11:21 ` Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190418112018.GA20470@red-moon \
--to=lorenzo.pieralisi@arm.com \
--cc=bhelgaas@google.com \
--cc=eric.auger@redhat.com \
--cc=hanjun.guo@linaro.org \
--cc=iommu@lists.linux-foundation.org \
--cc=jean-philippe.brucker@arm.com \
--cc=joro@8bytes.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=okaya@kernel.org \
--cc=rjw@rjwysocki.net \
--cc=robin.murphy@arm.com \
--cc=sudeep.holla@arm.com \
--cc=will.deacon@arm.com \
--cc=zhongmiao@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.