All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sudeep Holla <sudeep.holla@arm.com>
To: Amit Kucheria <amit.kucheria@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	bjorn.andersson@linaro.org, andy.gross@linaro.org,
	David Brown <david.brown@linaro.org>,
	Li Yang <leoyang.li@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
	devicetree@vger.kernel.org, Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCHv1 2/8] Documentation: arm: Link idle-states binding to code
Date: Fri, 10 May 2019 14:02:40 +0100	[thread overview]
Message-ID: <20190510130240.GC10284@e107155-lin> (raw)
In-Reply-To: <5f25e2b3096fa73f205e1797e355e049ed9f8c9c.1557486950.git.amit.kucheria@linaro.org>

On Fri, May 10, 2019 at 04:59:40PM +0530, Amit Kucheria wrote:
> The enable-method needs to be psci for the psci_cpuidle_ops to be
> correctly registered.
>
> Add a note to the binding documentation on where to find the declaration
> of the enable-method since it is a macro and escapes any attempts to
> grep for it.
>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
>  Documentation/devicetree/bindings/arm/idle-states.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt
> index 45730ba60af5..3a42335a6f3d 100644
> --- a/Documentation/devicetree/bindings/arm/idle-states.txt
> +++ b/Documentation/devicetree/bindings/arm/idle-states.txt
> @@ -239,6 +239,10 @@ processor idle states, defined as device tree nodes, are listed.
>  			# On ARM v8 64-bit this property is required and must
>  			  be:
>  			   - "psci"
> +			     (This assumes that the enable-method is "psci"
> +			     in the cpu node[6] that then uses the
> +			     CPUIDLE_METHOD_OF_DECLARE macro to setup the
> +			     psci_cpuidle_ops callbacks)

I don't prefer to refer some Linux implementation macros in DT bindings
as they may disappear any day. Further, the use of CPUIDLE_METHOD_OF_DECLARE
is restricted to ARM32 platforms only. So better to move it down without
the reference to the above macro or any kernel implementation details if
possible.

>  			# On ARM 32-bit systems this property is optional
>

Something like:
"This assumes that the "enable-method" property is set to "psci" in
in the cpu node[6] and use this property to set up the CPU idle
management in OS PM implementations"

With something on these line, you can add:

Acked-by: Sudeep Holla <sudeep.holla@arm.com

--
Regards,
Sudeep

  reply	other threads:[~2019-05-10 13:02 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10 11:29 [PATCHv1 0/8] qcom: Add cpuidle to some platforms Amit Kucheria
2019-05-10 11:29 ` Amit Kucheria
2019-05-10 11:29 ` [PATCHv1 1/8] arm64: dts: Fix various entry-method properties to reflect documentation Amit Kucheria
2019-05-10 11:29   ` Amit Kucheria
2019-05-10 12:54   ` Sudeep Holla
2019-05-10 12:54     ` Sudeep Holla
2019-05-13 18:39   ` Bjorn Andersson
2019-05-13 18:39     ` Bjorn Andersson
2019-05-14  5:57     ` Amit Kucheria
2019-05-14  5:57       ` Amit Kucheria
2019-05-14 16:11   ` Niklas Cassel
2019-05-14 16:11     ` Niklas Cassel
2019-05-10 11:29 ` [PATCHv1 2/8] Documentation: arm: Link idle-states binding to code Amit Kucheria
2019-05-10 13:02   ` Sudeep Holla [this message]
2019-05-10 11:29 ` [PATCHv1 3/8] arm64: dts: qcom: msm8916: Add entry-method property for the idle-states node Amit Kucheria
2019-05-14 16:12   ` Niklas Cassel
2019-05-17 15:40   ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 4/8] arm64: dts: qcom: msm8916: Use more generic idle state names Amit Kucheria
2019-05-14 16:12   ` Niklas Cassel
2019-05-15 10:13     ` Amit Kucheria
2019-05-15 13:02       ` Niklas Cassel
2019-05-21  5:38         ` Amit Kucheria
2019-05-21  8:50           ` Niklas Cassel
2019-05-17 15:41   ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 5/8] arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states Amit Kucheria
2019-05-14 16:12   ` Niklas Cassel
2019-05-17 15:42   ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 6/8] arm64: dts: qcom: msm8996: " Amit Kucheria
2019-05-14 16:12   ` Niklas Cassel
2019-05-17  9:07     ` Amit Kucheria
2019-05-17 15:55   ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 7/8] arm64: dts: qcom: msm8998: " Amit Kucheria
2019-05-10 13:15   ` Marc Gonzalez
2019-05-10 14:12     ` Amit Kucheria
2019-05-10 15:11       ` Marc Gonzalez
2019-05-13 12:38         ` Amit Kucheria
2019-05-14 16:13   ` Niklas Cassel
2019-05-17 16:11   ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 8/8] arm64: dts: qcom: sdm845: " Amit Kucheria
2019-05-14 16:13   ` Niklas Cassel
2019-05-17 16:25   ` Daniel Lezcano
2019-05-14 16:11 ` [PATCHv1 0/8] qcom: Add cpuidle to some platforms Niklas Cassel
2019-05-14 16:11   ` Niklas Cassel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190510130240.GC10284@e107155-lin \
    --to=sudeep.holla@arm.com \
    --cc=amit.kucheria@linaro.org \
    --cc=andy.gross@linaro.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=david.brown@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.