From: Niklas Cassel <niklas.cassel@linaro.org>
To: Amit Kucheria <amit.kucheria@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
bjorn.andersson@linaro.org, andy.gross@linaro.org,
David Brown <david.brown@linaro.org>,
Li Yang <leoyang.li@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCHv1 4/8] arm64: dts: qcom: msm8916: Use more generic idle state names
Date: Tue, 14 May 2019 18:12:20 +0200 [thread overview]
Message-ID: <20190514161220.GC1824@centauri.ideon.se> (raw)
In-Reply-To: <2a0626da4d8d5a1018c351b24b63e5e0d7a45a10.1557486950.git.amit.kucheria@linaro.org>
On Fri, May 10, 2019 at 04:59:42PM +0530, Amit Kucheria wrote:
> Instead of using Qualcomm-specific terminology, use generic node names
> for the idle states that are easier to understand. Move the description
> into the "idle-state-name" property.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index ded1052e5693..400b609bb3fd 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -110,7 +110,7 @@
> reg = <0x0>;
> next-level-cache = <&L2_0>;
> enable-method = "psci";
> - cpu-idle-states = <&CPU_SPC>;
> + cpu-idle-states = <&CPU_SLEEP_0>;
> clocks = <&apcs>;
> operating-points-v2 = <&cpu_opp_table>;
> #cooling-cells = <2>;
> @@ -122,7 +122,7 @@
> reg = <0x1>;
> next-level-cache = <&L2_0>;
> enable-method = "psci";
> - cpu-idle-states = <&CPU_SPC>;
> + cpu-idle-states = <&CPU_SLEEP_0>;
> clocks = <&apcs>;
> operating-points-v2 = <&cpu_opp_table>;
> #cooling-cells = <2>;
> @@ -134,7 +134,7 @@
> reg = <0x2>;
> next-level-cache = <&L2_0>;
> enable-method = "psci";
> - cpu-idle-states = <&CPU_SPC>;
> + cpu-idle-states = <&CPU_SLEEP_0>;
> clocks = <&apcs>;
> operating-points-v2 = <&cpu_opp_table>;
> #cooling-cells = <2>;
> @@ -146,7 +146,7 @@
> reg = <0x3>;
> next-level-cache = <&L2_0>;
> enable-method = "psci";
> - cpu-idle-states = <&CPU_SPC>;
> + cpu-idle-states = <&CPU_SLEEP_0>;
> clocks = <&apcs>;
> operating-points-v2 = <&cpu_opp_table>;
> #cooling-cells = <2>;
> @@ -160,8 +160,9 @@
> idle-states {
> entry-method="psci";
Please add a space before and after "=".
>
> - CPU_SPC: spc {
> + CPU_SLEEP_0: cpu-sleep-0 {
While I like your idea of using power state names from
Server Base System Architecture document (SBSA) where applicable,
does each qcom power state have a matching state in SBSA?
These are the qcom power states:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/Documentation/devicetree/bindings/arm/msm/lpm-levels.txt?h=msm-4.4#n53
Note that qcom defines:
"wfi", "retention", "gdhs", "pc", "fpc"
while SBSA simply defines "idle_standby" (aka wfi), "idle_retention", "sleep".
Unless you know the equivalent name for each qcom power state
(perhaps several qcom power states are really the same SBSA state?),
I think that you should omit the renaming from this patch series.
> compatible = "arm,idle-state";
> + idle-state-name = "standalone-power-collapse";
> arm,psci-suspend-param = <0x40000002>;
> entry-latency-us = <130>;
> exit-latency-us = <150>;
> --
> 2.17.1
>
next prev parent reply other threads:[~2019-05-14 16:12 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-10 11:29 [PATCHv1 0/8] qcom: Add cpuidle to some platforms Amit Kucheria
2019-05-10 11:29 ` Amit Kucheria
2019-05-10 11:29 ` [PATCHv1 1/8] arm64: dts: Fix various entry-method properties to reflect documentation Amit Kucheria
2019-05-10 11:29 ` Amit Kucheria
2019-05-10 12:54 ` Sudeep Holla
2019-05-10 12:54 ` Sudeep Holla
2019-05-13 18:39 ` Bjorn Andersson
2019-05-13 18:39 ` Bjorn Andersson
2019-05-14 5:57 ` Amit Kucheria
2019-05-14 5:57 ` Amit Kucheria
2019-05-14 16:11 ` Niklas Cassel
2019-05-14 16:11 ` Niklas Cassel
2019-05-10 11:29 ` [PATCHv1 2/8] Documentation: arm: Link idle-states binding to code Amit Kucheria
2019-05-10 13:02 ` Sudeep Holla
2019-05-10 11:29 ` [PATCHv1 3/8] arm64: dts: qcom: msm8916: Add entry-method property for the idle-states node Amit Kucheria
2019-05-14 16:12 ` Niklas Cassel
2019-05-17 15:40 ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 4/8] arm64: dts: qcom: msm8916: Use more generic idle state names Amit Kucheria
2019-05-14 16:12 ` Niklas Cassel [this message]
2019-05-15 10:13 ` Amit Kucheria
2019-05-15 13:02 ` Niklas Cassel
2019-05-21 5:38 ` Amit Kucheria
2019-05-21 8:50 ` Niklas Cassel
2019-05-17 15:41 ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 5/8] arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states Amit Kucheria
2019-05-14 16:12 ` Niklas Cassel
2019-05-17 15:42 ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 6/8] arm64: dts: qcom: msm8996: " Amit Kucheria
2019-05-14 16:12 ` Niklas Cassel
2019-05-17 9:07 ` Amit Kucheria
2019-05-17 15:55 ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 7/8] arm64: dts: qcom: msm8998: " Amit Kucheria
2019-05-10 13:15 ` Marc Gonzalez
2019-05-10 14:12 ` Amit Kucheria
2019-05-10 15:11 ` Marc Gonzalez
2019-05-13 12:38 ` Amit Kucheria
2019-05-14 16:13 ` Niklas Cassel
2019-05-17 16:11 ` Daniel Lezcano
2019-05-10 11:29 ` [PATCHv1 8/8] arm64: dts: qcom: sdm845: " Amit Kucheria
2019-05-14 16:13 ` Niklas Cassel
2019-05-17 16:25 ` Daniel Lezcano
2019-05-14 16:11 ` [PATCHv1 0/8] qcom: Add cpuidle to some platforms Niklas Cassel
2019-05-14 16:11 ` Niklas Cassel
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